K5P2880YCM Datasheet, PDF (12/29 Pages) Samsung semiconductor – Multi-Chip Package MEMORY 128M Bit 16Mx8 Nand Flash Memory / 8M Bit 1Mx8/512Kx16 Full CMOS SRAM

K5P2880YCM - T085
Error in write or read operation
Over its life time, the additional invalid blocks may develop with NAND Flash memory. Refer to the qualification report for the actual
data.The following possible failure modes should be considered to implement a highly reliable system. In the case of status read fail-
ure after erase or program, block replacement should be done. To improve the efficiency of memory space, it is recommended that
the read or verification failure due to single bit error be reclaimed by ECC without any block replacement. The said additional block
failure rate does not include those reclaimed blocks.
Write
Read
Failure Mode
Erase Failure
Program Failure
Single Bit Failure
Detection and Countermeasure sequence
Status Read after Erase --> Block Replacement
Status Read after Program --> Block Replacement
Read back ( Verify after Program) --> Block Replacement
or ECC Correction
Verify ECC -> ECC Correction
ECC
: Error Correcting Code --> Hamming Code etc.
Example) 1bit correction & 2bit detection
Figure 11. Flash Program flow chart
Start
Write 80h
If ECC is used, this verification
operation is not needed.
Write 00h
Write Address
Write Address
Write Data
Write 10h
Wait for tR Time
Verify Data
*
No _{Program Error}
Read Status Registe
I/O 6 = 1 ?
No
or R/B = 1 ?
*
No
Program Error
Yes
I/O 0 = 0 ?
Yes
Program Completed
* : If program operation results in an error, map out
the block including the page in error and copy the
target data to another block.
Yes
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Revision 0.0
June. 2001