K5P2880YCM Datasheet, PDF (17/29 Pages) Samsung semiconductor – Multi-Chip Package MEMORY 128M Bit 16Mx8 Nand Flash Memory / 8M Bit 1Mx8/512Kx16 Full CMOS SRAM

K5P2880YCM - T085
DC AND OPERATING CHARACTERISTICS(Continued)
Parameter
Symbol
Test Conditions
Typ
Max
Unit
Flash
Active Sequential Read
Currnt
Active Program Current
ICC1f
ICC2f
tRC=50ns,CEf=VIL, IOUT=0mA
VCCf=VCCfMax,VCCQf=VCCQfMax
VCCf=VCCfMax,VCCQf=VCCQfMax
10
20
mA
10
20
mA
Active Erase Current
Stand_by Current
ICC3f
ISB2f
VCCf=VCCfMax,VCCQf=VCCQfMax
CEf=VccQf, WP=0V/VCCQf
10
20
mA
10
50
µA
Operating Current
SRAM
Stand_by Current(CMOS)
ICC1s
ICC2s
ISB2s
Cycle time=1µs, 100% duty, CS1s≤0.2V,
CS2s≥VccS-0.2V, All outputs open
VIN≤0.2V or VIN≥VCCS-0.2V
Cycle time=Min, 100% duty, CS1s=VIL,
CS2s=VIH
All outputs open, VIN=VIL or VIH
CS1s≥VccS-0.2V, CS2s≥VccS-0.2V (CS1s
controlled) or CS2s≤0.2V (CS2s controlled),
BYTES=VSS or VCCS
Other input =0~VccS
5
mA
30
mA
15
µA
CAPACITANCE (TA = 25 °C, VCC = 3.0V, f = 1.0MHz)
Item
Input/Output Capacitance
Input Capacitance
Symbol
Test Condition
Min
CI/O
VIL=0V
-
CIN
VIN=0V
-
Note : Capacitance is periodically sampled and not 100% tested.
Max
20
18
Unit
pF
pF
VALID BLOCK OF FLASH MEMORY
Parameter
Valid Block Number
Symbol
NVB
Min
1014
Typ.
1020
Max
1024
Unit
Blocks
NOTE :
1. The Flash memory may include invalid blocks when first shipped. Additional invalid blocks may develop while being used. The number of valid
blocks is presented with both cases of invalid blocks considered. Invalid blocks are defined as blocks that contain one or more bad bits. Do not try to
access these invalid blocks for program and erase. Refer to the attached technical notes for a appropriate management of invalid blocks.
2. The 1st block, which is placed on 00h block address, is guaranteed to be a valid block.
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Revision 0.0
June. 2001