K5P2880YCM Datasheet, PDF (15/29 Pages) Samsung semiconductor – Multi-Chip Package MEMORY 128M Bit 16Mx8 Nand Flash Memory / 8M Bit 1Mx8/512Kx16 Full CMOS SRAM

K5P2880YCM - T085
System Interface Using CE don’t-care.
For an easier system interface, CE may be inactive during data-loading or sequential data-reading as shown below. The internal
528byte page registers are utilized as seperate buffers for this operation and the system design gets more flexible. In addition, for
voice or audio applications which use slow cycle time on the order of u-seconds, de-activating CE during the data-loading and read-
ing would provide significant saving in power consumption.
Figure 16. Program Operation with CE don’t-care.
CLE
CE
CE dont’-care
WE
ALE
I/O0~7
80h Start Add.(3Cycle)
Data Input
Data Input
10h
(Min. 10ns)
tCS
tCH
CE
tWP
WE
CE
RE
I/O0~7
(Max. 45ns)
tCEA
tREA
out
Figure 17. Read Operation with CE don’t-care.
CLE
CE
RE
ALE
R/B
WE
I/O0~7
tR
00h Start Add.(3Cycle)
- 15 -
CE dont’-care
Data Output(sequential)
Revision 0.0
June. 2001