HD66787 Datasheet, PDF (93/159 Pages) Renesas Technology Corp – 528-channel, One-chip Driver with 262,144-color Display RAM and Power Supply Circuit for Low-temperature Poli-Si TFT (LTPS-TFT) Panels with Incorporat

HD66787
Preliminary
6-bit RGB interface
The 6-bit RGB interface is selected by setting RIM1-0 bits to 10. The display operation is synchronized
with VSYNC, HSYNC, and DOTCLK signals. Display data are transmitted to RAM in synchronization
with the display operation through 6-bit RGB data bus (PD17-12) according to data valid signal (VLD),
and the data enable signal (ENABLE). Unused pins (PD11 to 0) must be fixed to either IOVcc or GND
level.
The instructions are set only through a system interface.
LCDC
VSYNC
HSYNC
DOTCLK
VLD
HD66787
ENABLE
PD17-12
6
PD11-0
12
GND
6-bit RGB interface
RAM data write
1^st Transmission
2^nd Transmission
3^rd Transmission
INPUT _{PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD}
17 16 15 14 13 12 17 16 15 14 13 12 17 16 15 14 13 12
Write Data
to GRAM
R5
R4
R3 R2 R1
R0
G5 G4 G3 G2 G1 G0 B5
B4
B3
B2
B1
B0
One Pixel
262,144 colors are available in 6-bit system interface.
Data format for 6-bit interface
Data transmission synchronization in 6-bit RGB interface mode
The HD66787 incorporates a transmission counter to count the first, second, third data transmissions in the
6-bit RBG interface mode. The transmission counter is reset to the first transmission on the falling edge of
VSYNC. When a discrepancy occurs in the transmission of first, second and third data, the counter is reset
to the first data transmission at the start of each frame (on the falling edge of VSYNC) and the data
transmission restarts in the correct order from the next frame. In case of displaying moving pictures, which
requires consecutive data transfer, this function minimizes the effect from the discrepancy in the data
transmission and makes it easy to return to the normal display.
The internal display operation is executed by pixel. Note that each DOTCLK input must correspond to a
pixel. Otherwise data transmission discrepancies will occur and affect the displays of the current and
ensuing frames.
Rev.0.22, May.23.2003, page 93 of 159