HD66787 Datasheet, PDF (107/159 Pages) Renesas Technology Corp – 528-channel, One-chip Driver with 262,144-color Display RAM and Power Supply Circuit for Low-temperature Poli-Si TFT (LTPS-TFT) Panels with Incorporat

HD66787
Preliminary
CS*
(input)
E
(input)
DB15-0
(input/output)
Index
(R22)
1
2
3
4
5
6
7
81
2
3
4
5
6
7
8
RAM
data
1
Upper
RAM
data
1
lower
RAM
data
2
Upper
RAM
data
2
lower
RAM
data
3
Upper
RAM
data
3
lower
RAM
data
4
Upper
RAM
data
4
lower
RAM
data
1
Upper
RAM
data
1
lower
RAM
data
2
Upper
RAM
data
2
lower
RAM
data
3
Upper
RAM
data
3
lower
RAM
data
4
Upper
RAM
data
4
lower
RAM write
execution time
RAM write
execution time ^*Note
RAM write data
(64 its)
RAM data 1 to 4
RAM data 5 to 8
RAM address
(AC15 to 0)
“0000”H
“0004”H
“The lower two bits of the address must be set as follows in high-speed write mode.
When ID0 = 0, set the lower two bits of the address to 11.
When ID1 = 1, set the lower two bits of the address to 00.
Note : In the high-speed mode (HWM), data are written to the RAM every 4 words. This means in the 8-bit interface mode,
data are written to the RAM for every eight write operation.
Operation of High-Speed Consecutive Writing to RAM (8-Bit Interface)
Notes to the high-speed RAM write mode
1. The logical/compare operations are not available.
2. The RAM write operation is executed every four words. Set the lower 2 bits of the addresses as
follows when setting addresses.
*When ID0=0, the lower two bits in the address must be set to 11 before RAM write.
*When ID0=1, the lower two bits in the address must be set to 00 before RAM write.
3. The RAM write operation is executed every four words. If RAM write operation is terminated before
all four-word data is written to RAM, the last data will not be written to RAM.
4. When the index register is set to R22H (RAM data write), the first RAM write operation is always
executed. In this case, RAM data read is not operable simultaneously. During RAM read, set the
HWM to 0.
5. The high-speed RAM write mode is not compatible with the normal RAM write mode. When the
mode must be switched to the other, make a new address set before starting RAM write.
6. When writing data in high speed RAM write mode within the range specified with the window address,
some window-address range may require dummy write operation. See “High-Speed RAM Write with
Window Address Function”.
Rev.0.22, May.23.2003, page 107 of 159