HD66787 Datasheet, PDF (48/159 Pages) Renesas Technology Corp – 528-channel, One-chip Driver with 262,144-color Display RAM and Power Supply Circuit for Low-temperature Poli-Si TFT (LTPS-TFT) Panels with Incorporat

HD66787
Preliminary
STG2-0:Set the output position of the pulse of SFTCLK signal.
STG2-0
STG
2
STG
1
STG
0
SFTCLK signal : pulse output position
internal operation
(synchronized with the internal operating clock)
RGB interface operation
(synchronized with DOTCLK)
0
0
0
0 clock
0 clock
0
0
1
1 clock
8 clocks
0
1
0
2 clocks
16 clocks
0
1
1
3 clocks
24 clocks
1
0
0
4 clocks
32 clocks
1
0
1
5 clocks
40 clocks
1
1
0
6 clocks
48 clocks
1
1
1
7 clocks
56 clocks
Note 1) The number of clocks is counted from the falling edge of the CL1 signal.
SHW1-0: Set the width of the pulse of SFTCLK signal during “High”.
SHW1-0
SHW
1
0
0
1
1
SHW
0
0
1
0
1
SFTCLK signal : purse width during “High”
internal operation
(synchronized with the internal operating clock)
RGB interface operation
(synchronized with DOTCLK)
1 clock
8 clocks
2 clocks
16 clocks
3 clocks
24 clocks
4 clocks
32 clocks
In making settings for SFTCLK signal, the following condition must be observed.
STG2-0 + SHW1-0
≤ 8 clocks (Internal operation)
≤ 64 clocks (RGB interface operation)
Rev.0.22, May.23.2003, page 48 of 159