HD66787 Datasheet, PDF (32/159 Pages) Renesas Technology Corp – 528-channel, One-chip Driver with 262,144-color Display RAM and Power Supply Circuit for Low-temperature Poli-Si TFT (LTPS-TFT) Panels with Incorporat

HD66787
Preliminary
The following table shows the relationship between EPL, ENABLE, VLD and RAM access.
EPL
ENABLE
VLD
RAM write
RAM address
0
0
0
Valid
Updated
0
0
1
Invalid
Updated
0
1
*
Invalid
Hold
1
0
*
Invalid
Hold
1
1
0
Valid
Updated
1
1
1
Invalid
Updated
VSPL: Invert the polarity of signal for VSYNC pin.
VSPL = ”0” : Low active.
VSPL = ”1” : High active.
HSPL: Invert the polarity of signal for HSYNC pin.
HSPL = ”0” : Low active.
HSPL = ”1” : High active.
DPL: Invert the polarity of signal for DOTCLK pin.
DPL = ”0”
DPL = ”1”
: Data are read in synchronization with the rising edge of the DOTCLK.
: Data are read in synchronization with the falling edge of the DOTCLK.
NL4-0: Specify the number of LCD drive raster-rows. The number of drive raster-rows is changeable by 8
multiples. The GRAM address mapping is independent of this setting. Select a number of raster-rows that
the display size covers the size of a panel.
Rev.0.22, May.23.2003, page 32 of 159