HD66787 Datasheet, PDF (89/159 Pages) Renesas Technology Corp – 528-channel, One-chip Driver with 262,144-color Display RAM and Power Supply Circuit for Low-temperature Poli-Si TFT (LTPS-TFT) Panels with Incorporat

HD66787
Preliminary
External Display Interface
The following interfaces are available as the external display interface (RGB interface). The interface is
selected by setting RIM1-0 bits. RAM is accessible through the RGB interface.
RIM bits setting and RGB interface
RIM1 RIM0 RGB Interface
PD Pin
0
0
18-bit RGB interface
PD17-0
0
1
16-bit RGB interface
PD17-13, 11-1
1
0
6-bit RGB interface
PD17-12
1
1
Setting disabled
Note 1) The use of multiple interfaces simultaneously is not possible.
RGB interface
Through the RGB-I/F, the display operation is performed in synchronization with VSYNC, HSYNC, and
DOTCLK. The RGB interface enables data transmission with low power consumption by overwriting the
area that needs update in high-speed write mode in combination with the window address function. The
front and back porches must be set before and after the display period.
VSYNC
Display area for RAM data
Display area
for moving pictures
Back porch period (BP3-0)
Display period (NL4-0)
Front porch period (FP3-0)
HSYNC
DOTCLK
ENABLE
VLD
PD17-0
Note 1) The front porch period continues until the next input
of VSYNC signal.
Note 2) The DOTCLK signal must be supplied consecutively.
VSYNC: Frame synchronization signal
HSYNC: Raster-row synchronization signal
DOTCLK: Dot clock
ENABLE: Data enable signal
VLD: Data valid signal
PD17-0: Display data for RGB (6:6:6)
Back porch period (BPP):14H>=BP3-0>=2H
Front porch period (FPP):14H>=FP3-0>=2H
FPP + BPP=<16H
Display operation period: NL4-0 =< 240H
The number of raster-rows of 1 frame: FPP + DP + BPP
Note 3) In RGB interface mode, VSYNC, HSYNC, and DOTCLK more than to achieve the LCD resolution must be supplied.
RGB interface
Rev.0.22, May.23.2003, page 89 of 159