HD66787 Datasheet, PDF (10/159 Pages) Renesas Technology Corp – 528-channel, One-chip Driver with 262,144-color Display RAM and Power Supply Circuit for Low-temperature Poli-Si TFT (LTPS-TFT) Panels with Incorporat

HD66787
Signals
ENABLE
Number I/O
of Pins
1
I
VSYNC
1
I
HSYNC
1
I
DOTCLK
1
I
PD0~PD17
18
I
RESET*
S1~S528
1
I
528
O
LSEL22,21,20 3
I
LSEL12,11,10 3
I
Preliminary
Connected Functions
to
MPU
EPL ENABLE VLD
0
0
0
0
0
1
0
1
*
1
0
*
1
1
0
1
1
1
RAM Write
Valid
Invalid
Invalid
Invalid
Valid
Invalid
RAM Address
Updated
Updated
Held
Held
Updated
Updated
MPU
MPU
MPU
MPU
MPU or
reset circuit
LCD
GND or
IOVcc
GND or
IOVcc
Frame synchronizing signal.
This signal is active low.
Must be fixed at the IOVcc level while not used.
Line synchronizing signal.
This signal is active low.
Must be fixed at the IOVcc level while not used.
Dot-clock signal
This signal is active low
The timing of data input is determined at the falling edge of the
signal. Must be fixed at the IOVcc level while not used
18-bit bus for RGB data.
6-bit bus: PD17-PD12
16-bit bus: PD17-PD13 and PD11-PD1
18-bit bus: PD17-PD0
Unused pins must be fixed to the IOVcc or GND level.
Reset pin.
Initializes the LSI at the “Low” level.
Power-on reset required after turning on the power.
Output voltage applied to liquid crystal.
The shift direction of segment signals is changeable with SS
bit. For example, if SS = 0, RAM address “0000” is output
from S1. If SS = 1, it is output from S528.
S1, S4, S7, ... display red (R), S2, S5, S8, ... display green (G),
and S3, S6, S9, ... display blue (B) (SS = 0).
Output level shift output signals, SOUT24, 23, 22,21.
Output level shift output signals, SOUT14, 13, 12,11.
Rev.0.22, May.23.2003, page 10 of 159