HD66787 Datasheet, PDF(38/159 Page) Renesas Technology Corp – 528-channel, One-chip Driver with 262,144-color Display RAM and Power Supply Circuit for Low-temperature Poli-Si TFT (LTPS-TFT) Panels with Incorporat

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HD66787 Datasheet, PDF (38/159 Pages) Renesas Technology Corp – 528-channel, One-chip Driver with 262,144-color Display RAM and Power Supply Circuit for Low-temperature Poli-Si TFT (LTPS-TFT) Panels with Incorporat

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HD66787

DTE: When DTE = 0, the DISPTMG output is fixed to GND.

DTE Bit

DTE

DISPTMG Output

Halt (GND)

Operation (Vcc/GND)

Preliminary

D1â0: The graphics display is on when D1 = 1, and off when D1 = 0. When setting D1 = 0, the data are

retained in GRAM. This means the graphics is instantly redisplayed when setting D1 to 1. When D1 is 0

(i.e., the display is off) all the source outputs are set to the GND level. This reduces the charged/discharged

current on LCD, accompanied by the liquid crystal AC drive.

When D1-0 = 01, the HD66787 continues the internal display operation, even while the external display is

off. When D1-0 = 00, both the internal display operations and the external display operation are halted.

In combination with GON and DTE bits, D1-0 bits control ON/OFF of display. For details, see the

âInstruction Setting Flowâ section.

D1-0

D1 D0

Source Output

HD67789

Gate-Driver Control Signals

Internal Operations (CL1, FLM, and M)

GND

Halt

GND

Operate

Unlit display

Operate

Display

Operate

Note 1) Data are written to GRAM from the microcomputer irrespective of the setting of D1-0 bits.

Note 2) In the standby mode, D1-0 = "00". However, the D1-0 register setting before entering standby

modes is retained.

Display Control 2 (R08h)

R/W RS

IB15 IB14 IB13 IB12 IB11 IB10 IB9 IB8 IB7 IB6 IB5 IB4 IB3 IB2 IB1 IB0

0 0 0 0 FP3 FP2 FP1 FP0 0 0 0 0 BP3 BP2 BP1 BP0

FP3-0/BP3-0: Make settings for blank periods (the front and back porches), which are placed at the

beginning and end of the display. FP3-0 and BP3-0 bits specify the number of raster-rows for the front and

back porch respectively. When making this setting, make sure:

BP + FP = <16 raster-rows

FP >= 2 raster-rows

BP >= 2 raster-rows

In the external display interface mode, the back porch (BP) starts on the falling edge of VSYNC signal,

Rev.0.22, May.23.2003, page 38 of 159

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