HD66787 Datasheet, PDF (122/159 Pages) Renesas Technology Corp – 528-channel, One-chip Driver with 262,144-color Display RAM and Power Supply Circuit for Low-temperature Poli-Si TFT (LTPS-TFT) Panels with Incorporat

HD66787
The grayscale levels (V0-V31) are calculated according to the following formulas.
Formulas for calculating voltage (Positive polarity) (1)
Preliminary
Pin
KVP0
Formula
VREG1OUT - ∆ V*VRP0/SUMRP
Reference
Fine adjustment register value _Voltage
-
VINP0
KVP1
KVP2
KVP3
KVP4
KVP5
KVP6
KVP7
KVP8
KVP9
KVP10
KVP11
KVP12
KVP13
KVP14
KVP15
KVP16
KVP17
KVP18
KVP19
KVP20
KVP21
KVP22
KVP23
KVP24
KVP25
KVP26
KVP27
KVP28
KVP29
KVP30
KVP31
KVP32
KVP33
KVP34
KVP35
KVP36
KVP37
KVP38
KVP39
KVP40
KVP41
KVP42
KVP43
KVP44
KVP45
KVP46
KVP47
KVP48
KVP49
VREG1OUT - ∆ V* VRP0+5R)/SUMRP
VREG1OUT - ∆ V* VRP0+9R)/SUMRP
VREG1OUT - ∆ V* VRP0+13R)/SUMRP
VREG1OUT - ∆ V* VRP0+17R)/SUMRP
VREG1OUT - ∆ V* VRP0+21R)/SUMRP
VREG1OUT - ∆ V* VRP0+25R)/SUMRP
VREG1OUT - ∆ V* VRP0+29R)/SUMRP
VREG1OUT - ∆ V* VRP0+33R)/SUMRP
VREG1OUT - ∆ V*(VRP0+33R+VRHP)/SUMRP
VREG1OUT - ∆ V*(VRP0+34R+VRHP)/SUMRP
VREG1OUT - ∆ V*(VRP0+35R+VRHP)/SUMRP
VREG1OUT - ∆ V*(VRP0+36R+VRHP)/SUMRP
VREG1OUT - ∆ V*(VRP0+37R+VRHP)/SUMRP
VREG1OUT - ∆ V*(VRP0+38R+VRHP)/SUMRP
VREG1OUT - ∆ V*(VRP0+39R+VRHP)/SUMRP
VREG1OUT - ∆ V*(VRP0+40R+VRHP)/SUMRP
VREG1OUT - ∆ V*(VRP0+45R+VRHP)/SUMRP
VREG1OUT - ∆ V*(VRP0+46R+VRHP)/SUMRP
VREG1OUT - ∆ V*(VRP0+47R+VRHP)/SUMRP
VREG1OUT - ∆ V*(VRP0+48R+VRHP)/SUMRP
VREG1OUT - ∆ V*(VRP0+49R+VRHP)/SUMRP
VREG1OUT - ∆ V*(VRP0+50R+VRHP)/SUMRP
VREG1OUT - ∆ V*(VRP0+51R+VRHP)/SUMRP
VREG1OUT - ∆ V*(VRP0+52R+VRHP)/SUMRP
VREG1OUT - ∆ V*(VRP0+68R+VRHP)/SUMRP
VREG1OUT - ∆ V*(VRP0+69R+VRHP)/SUMRP
VREG1OUT - ∆ V*(VRP0+70R+VRHP)/SUMRP
VREG1OUT - ∆ V*(VRP0+71R+VRHP)/SUMRP
VREG1OUT - ∆ V*(VRP0+72R+VRHP)/SUMRP
VREG1OUT - ∆ V*(VRP0+73R+VRHP)/SUMRP
VREG1OUT - ∆ V*(VRP0+74R+VRHP)/SUMRP
VREG1OUT - ∆ V*(VRP0+75R+VRHP)/SUMRP
VREG1OUT - ∆ V*(VRP0+80R+VRHP)/SUMRP
VREG1OUT - ∆ V*(VRP0+81R+VRHP)/SUMRP
VREG1OUT - ∆ V*(VRP0+82R+VRHP)/SUMRP
VREG1OUT - ∆ V*(VRP0+83R+VRHP)/SUMRP
VREG1OUT - ∆ V*(VRP0+84R+VRHP)/SUMRP
VREG1OUT - ∆ V*(VRP0+85R+VRHP)/SUMRP
VREG1OUT - ∆ V*(VRP0+86R+VRHP)/SUMRP
VREG1OUT - ∆ V*(VRP0+87R+VRHP)/SUMRP
VREG1OUT - ∆ V*(VRP0+87R+VRHP+VRLP)/SUMRP
VREG1OUT - ∆ V*(VRP0+91R+VRHP+VRLP)/SUMRP
VREG1OUT - ∆ V*(VRP0+95R+VRHP+VRLP)/SUMRP
VREG1OUT - ∆ V*(VRP0+99R+VRHP+VRLP)/SUMRP
VREG1OUT - ∆ V*(VRP0+103R+VRHP+VRLP)/SUMRP
VREG1OUT - ∆ V*(VRP0+107R+VRHP+VRLP)/SUMRP
VREG1OUT - ∆ V*(VRP0+111R+VRHP+VRLP)/SUMRP
VREG1OUT - ∆ V*(VRP0+115R+VRHP+VRLP)/SUMRP
VREG1OUT - ∆ V*(VRP0+120R+VRHP+VRLP)/SUMRP
SUMRP : Sum of positive ladder resistors = 128R+VRHP+VRLP+VRP0+VRP1
SUMRN : Sum of negative ladder resistors = 128R+VRHN+VRLN+VRN0+VRN1
∆V : Voltage difference between VREG1OUT and VGS
PKP02-00 = "000"
PKP02-00 = "001"
PKP02-00 = "010"
PKP02-00 = "011"
PKP02-00 = "100"
PKP02-00 = "101"
PKP02-00 = "110"
PKP02-00 = "111"
PKP12-10 = "000"
PKP12-10 = "001"
PKP12-10 = "010"
PKP12-10 = "011"
PKP12-10 = "100"
PKP12-10 = "101"
PKP12-10 = "110"
PKP12-10 = "111"
PKP22-20 = "000"
PKP22-20 = "001"
PKP22-20 = "010"
PKP22-20 = "011"
PKP22-20 = "100"
PKP22-20 = "101"
PKP22-20 = "110"
PKP22-20 = "111"
PKP32-30 = "000"
PKP32-30 = "001"
PKP32-30 = "010"
PKP32-30 = "011"
PKP32-30 = "100"
PKP32-30 = "101"
PKP32-30 = "110"
PKP32-30 = "111"
PKP42-40 = "000"
PKP42-40 = "001"
PKP42-40 = "010"
PKP42-40 = "011"
PKP42-40 = "100"
PKP42-40 = "101"
PKP42-40 = "110"
PKP42-40 = "111"
PKP52-50 = "000"
PKP52-50 = "001"
PKP52-50 = "010"
PKP52-50 = "011"
PKP52-50 = "100"
PKP52-50 = "101"
PKP52-50 = "110"
PKP52-50 = "111"
-
VINP1
VINP2
VINP3
VINP4
VINP5
VINP6
VINP7
Rev.0.22, May.23.2003, page 122 of 159