HD66787 Datasheet, PDF (106/159 Pages) Renesas Technology Corp – 528-channel, One-chip Driver with 262,144-color Display RAM and Power Supply Circuit for Low-temperature Poli-Si TFT (LTPS-TFT) Panels with Incorporat

HD66787
Preliminary
High-Speed Burst RAM Write Function
The HD66787 incorporates high-speed burst RAM-write function, which writes data to RAM in one-fourth
the access time required for a standard RAM-write operation. This function is especially useful for
applications which require the high-speed rewrite of the display data such as display of colored moving
picture and so on.
In the high-speed RAM write mode (HWM), data to write to RAM is temporarily stored to the internal
register of HD66787. The data storage in the register is executed by word. When the data storage
operation is executed 4 times, all data stored in the register are written to RAM at once. While the data is
being written from the register to RAM, another set of data is being written to the register. This function
enables high-speed and consecutive RAM write, which are required in displaying moving pictures and so
on.
Microcomputer
18
Address
counter
(AC)
16
Register 1
Register 2
Register 3
72
Register 4
“0000H” “0001H” “0002H” “0003H”
GRAM
Operational flow of High-Speed Burst RAM Write
CS*
(input)
E
(input)
DB15-0
(input/output)
1
2
3
41
2
3
4
1
2
3
4
Index
(R22)
R^RA^AMM
d^da^a1tt^aa
1
RAM
data
2
RAM
data
3
RAM
data
4
RAM
data
5
RAM
data
6
RAM
data
7
RAM
data
8
RAM
data
9
RAM
data
10
RAM
data
11
RAM
data
12
RAM write
execution time
RAM write
execution time
RAM write
execution time
Index
(R22)
RAM write data
(72 bits)
RAM data 1 to 4
RAM data 5 to 8
RAM data 9 to 12
RAM address
(AC15 to 0)
“0000”H
“0004”H
“0008”H
“000A”H
The lower two bits of the address must be set as follows in the high-speed write mode.
When ID0 = 0, set the lower two bits of the address to 11.
When ID1 = 1, set the lower two bits of the address to 00.
Note : When terminating the high-speed RAM write, wait for the time required for the RAM write execution
(bus cycle line (tCYC) in the normal write mode) before executing the next instruction.
High-Speed Consecutive Write to RAM
Rev.0.22, May.23.2003, page 106 of 159