HD66787 Datasheet, PDF (69/159 Pages) Renesas Technology Corp – 528-channel, One-chip Driver with 262,144-color Display RAM and Power Supply Circuit for Low-temperature Poli-Si TFT (LTPS-TFT) Panels with Incorporat

HD66787
Preliminary
SS27–20: Specify the start position for driving the second screen by line. The liquid crystal is driven by
from the gate driver of “the set value + 1”. The second screen is driven when SPT = 1.
SE27–20: Specify the end position for driving the second screen by line. The liquid crystal is driven by to
the gate driver of “the set value + 1”. For instance, when SPT = 1, and SS27–20 = “20”H, SE27–20 =
“4F”H, the liquid crystal is driven from G33 to G80. Make sure that SS17–10 ≤ SE17–10 < SS27–20 ≤
SE27–20 ≤ “EF”H. For details, see the “Screen Split Drive Function” section.
Horizontal RAM Address Position (R44h)
Vertical RAM Address Position (R45h)
R/W RS IB15 IB14 IB13 IB12 IB11 IB10 IB9 IB8 IB7 IB6 IB5 IB4 IB3 IB2 IB1 IB0
W 1 HEA7 HEA6 HEA5 HEA4 HEA3 HEA2 HEA1 HEA0 HSA7 HSA6 HSA5 HSA4 HSA3 HSA2 HSA1 HSA0
W 1 VEA7 VEA6 VEA5 VEA4 VEA3 VEA2 VEA1 VEA0 VSA7 VSA6 VSA5 VSA4 VSA3 VSA2 VSA1 VSA0
HSA7-0/HEA7-0: Specify the start/end positions of the window-address range in the horizontal direction
by address. Data are written to GRAM within the area determined by the addresses specified by HEA7-0
and HSA7-0. These addresses must be set before RAM write. In setting these bits, make sure that “00”h ≤
HSA7-0 ≤ HEA7-0 ≤ “AF”h.
VSA7-0/VEA7-0: Specify the start/end positions of the window-address range in the vertical direction by
address. Data are written to GRAM within the area determined by the addresses specified by VEA7-0 and
VSA7-0. These addresses must be set before RAM write. In setting these bits, make sure that “00”h ≤
VSA7-0 ≤ VEA7-0 ≤ “EF”h.
VSA
0000h
HSA
HEA
Window Address
VEA
Window address setting area
“00”h=< HSA7-0=<HEA7-0=<“AF”h
“00”h=<VSA7-0=<VEA7-0=<“EF”h
GRAM address space
EFAFh
Note 1) The window address area is set within the GRAM address space.
Note 2) In the high-speed write mode, data are written to the GRAM every four words.
Therefore, depending on the window address setting, dummy write operations
are required. For details, see the "High-Speed Burst RAM Write Function" section.
Note 3) The address set must be within the window address area. In the high-speed
write mode, dummy write area must also be within the window address area.
GRAM address area and window-address range
Rev.0.22, May.23.2003, page 69 of 159