RX230 Datasheet, PDF (4/177 Pages) Renesas Technology Corp – 54-MHz 32-bit RX MCUs, built-in FPU, 88.56 DMIPS, up to 512-KB flash memory

RX230 Group, RX231 Group
1. Overview
Table 1.1
Outline of Specifications (3/4)
Classification
Timers
Module/Function
Independent watchdog
timer (IWDTa)
Realtime clock (RTCe)
Low power timer (LPT)
8-bit timer (TMR)
Communication
functions
Serial communications
interfaces (SCIg, SCIh)
IrDA interface (IRDA)
I²C bus interface (RIICa)
Serial peripheral interface
(RSPIa)
USB 2.0 host/function
module (USBd)
CAN module (RSCAN)
Description
 14 bits × 1 channel
 Count clock: Dedicated low-speed on-chip oscillator for the IWDT
Frequency divided by 1, 16, 32, 64, 128, or 256
 Clock source: Sub-clock
 Time/calendar
 Interrupts: Alarm interrupt, periodic interrupt, and carry interrupt
 Time-capture facility for three values
 16 bits × 1 channel
 Clock source: Sub-clock, Dedicated low-speed on-chip oscillator for the IWDT
Frequency divided by 2, 4, 8, 16, or 32
 (8 bits × 2 channels) × 2 units
 Seven internal clocks (PCLK/1, PCLK/2, PCLK/8, PCLK/32, PCLK/64, PCLK/1024, and PCLK/8192)
and an external clock can be selected
 Pulse output and PWM output with any duty cycle are available
 Two channels can be cascaded and used as a 16-bit timer
 7 channels (channel 0, 1, 5, 6, 8, 9: SCIg, channel 12: SCIh)
 SCIg
Serial communications modes: Asynchronous, clock synchronous, and smart-card interface
Multi-processor function
On-chip baud rate generator allows selection of the desired bit rate
Choice of LSB-first or MSB-first transfer
Average transfer rate clock can be input from TMR timers for SCI5, SCI6, and SCI12
Start-bit detection: Level or edge detection is selectable.
Simple I²C
Simple SPI
9-bit transfer mode
Bit rate modulation
Event linking by the ELC (only on channel 5)
 SCIh (The following functions are added to SCIg)
Supports the serial communications protocol, which contains the start frame and information frame
Supports the LIN format
 1 channel (SCI5 used)
 Supports encoding/decoding of waveforms conforming to IrDA standard 1.0
 1 channel
 Communications formats: I²C bus format/SMBus format
 Master mode or slave mode selectable
 Supports fast mode
 1 channel
 Transfer facility
Using the MOSI (master out, slave in), MISO (master in, slave out), SSL (slave select), and RSPCK
(RSPI clock) enables serial transfer through SPI operation (four lines) or clock-synchronous
operation (three lines)
 Capable of handling serial transfer as a master or slave
 Data formats
 Choice of LSB-first or MSB-first transfer
The number of bits in each transfer can be changed to 8, 9, 10, 11, 12, 13, 14, 15, 16, 20, 24, or
32 bits.
128-bit buffers for transmission and reception
Up to four frames can be transmitted or received in a single transfer operation (with each frame
having up to 32 bits)
 Double buffers for both transmission and reception
 USB Device Controller (UDC) and transceiver for USB 2.0 are incorporated.
 Host/function module: 1 port
 Compliant with USB version 2.0
 Transfer speed: Full-speed (12 Mbps), low-speed (1.5 Mbps)
 OTG (ON-The-Go) is supported.
 Isochronous transfer is supported.
 BC1.2 (Battery Charging Specification Revision 1.2) is supported.
 Internal power supply for USB (allows operation without external power input to the VCC_USB pin
when VCC = 4.0 to 5.5V)
 1 channel
 Compliance with the ISO11898-1 specification (standard frame and extended frame)
 16 Message boxes
R01DS0261EJ0110 Rev.1.10
Oct 30, 2015
Page 4 of 177