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RX230 Datasheet, PDF (121/177 Pages) Renesas Technology Corp – 54-MHz 32-bit RX MCUs, built-in FPU, 88.56 DMIPS, up to 512-KB flash memory | |||
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RX230 Group, RX231 Group
5. Electrical Characteristics
5.3.5
Bus Timing
Table 5.34 Bus Timing (1)
Conditions: 2.7 V ⤠VCC = VCC_USB = AVCC0 ⤠5.5 V, VSS = AVSS0 = VSS_USB = 0 V,
fBCLK ⤠32 MHz (BCLK pin output frequency ⤠16 MHz), Ta = â40 to +105°C, VOH = VCC à 0.5, VOL = VCC à 0.5,
IOH = â1.0 mA, IOL = 1.0 mA, CL = 30 pF, when normal output is selected by the drive capacity control register
Item
Symbol
Min.
Max.
Unit
Test Conditions
Address delay time
Byte control delay time
CS# delay time
RD# delay time
Read data setup time
Read data hold time
WR# delay time
Write data delay time
Write data hold time
WAIT# setup time
WAIT# hold time
tAD
â
55
ns
Figure 5.38 to
tBCD
â
55
ns
Figure 5.41
tCSD
â
55
ns
tRSD
â
55
ns
tRDS
40
â
ns
tRDH
0
â
ns
tWRD
â
55
ns
tWDD
â
55
ns
tWDH
0
â
ns
tWTS
40
â
ns
Figure 5.42
tWTH
0
â
ns
Table 5.35 Bus Timing (2)
Conditions: 1.8 V ⤠VCC = VCC_USB = AVCC0 < 2.7 V, VSS = AVSS0 = VSS_USB = 0 V,
fBCLK ⤠16 MHz (BCLK pin output frequency ⤠8 MHz), Ta = â40 to +105°C, VOH = VCC à 0.5, VOL = VCC à 0.5,
IOH = â1.0 mA, IOL = 1.0 mA, CL = 30 pF, when normal output is selected by the drive capacity control register
Item
Symbol
Min.
Max.
Unit
Test Conditions
Address delay time
Byte control delay time
CS# delay time
RD# delay time
Read data setup time
Read data hold time
WR# delay time
Write data delay time
Write data hold time
WAIT# setup time
WAIT# hold time
tAD
â
90
ns
Figure 5.38 to
tBCD
â
90
ns
Figure 5.41
tCSD
â
90
ns
tRSD
â
90
ns
tRDS
60
â
ns
tRDH
0
â
ns
tWRD
â
90
ns
tWDD
â
90
ns
tWDH
0
â
ns
tWTS
60
â
ns
Figure 5.42
tWTH
0
â
ns
R01DS0261EJ0110 Rev.1.10
Oct 30, 2015
Page 121 of 177
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