RX230 Datasheet, PDF (154/177 Pages) Renesas Technology Corp – 54-MHz 32-bit RX MCUs, built-in FPU, 88.56 DMIPS, up to 512-KB flash memory

RX230 Group, RX231 Group
5. Electrical Characteristics
Table 5.58 Characteristics of Power-On Reset Circuit and Voltage Detection Circuit (2)
Conditions: 1.8 V ≤ VCC0 = VCC_USB = AVCC0 ≤ 5.5 V, VSS = AVSS0 = VSS_USB = 0 V, T_a = –40 to +105°C
Item
Symbol
Min.
Typ.
Max.
Unit
Test Conditions
Wait time after
power-on reset
cancellation
At normal startup*¹
During fast startup
time*²
t_POR
t_POR
―
9.1
―
ms Figure 5.73
―
1.6
―
Wait time after
voltage monitoring 0
reset cancellation
Power-on voltage
monitoring 0 reset
disabled*¹
t_LVD0
―
568
―
μs Figure 5.74
Power-on voltage
monitoring 0 reset
enabled*²
―
100
―
Wait time after voltage monitoring 1 reset
cancellation
t_LVD1
―
100
―
μs Figure 5.75
Wait time after voltage monitoring 2 reset
cancellation
t_LVD2
―
100
―
μs Figure 5.76
Response delay time
Minimum VCC down time*³
t_det
―
―
350
μs Figure 5.72
t_VOFF
350
―
―
μs Figure 5.72, VCC = 1.0 V or
above
Power-on reset enable time
t_W(POR)
1
―
―
ms Figure 5.73, VCC = below 1.0
V
LVD operation stabilization time (after LVD is
Td_(E-A)
―
enabled)
―
300
μs Figure 5.75, Figure 5.76
Hysteresis width (power-on rest (POR))
V_PORH
―
110
―
mV
Hysteresis width (voltage detection circuit: LVD1
and LVD2)
V_LVH
―
70
―
mV When Vdet1_0 to Vdet1_4 is
selected
―
60
―
When Vdet1_5 to Vdet1_9 is
selected
―
50
―
When Vdet1_A or Vdet1_B is
selected
―
40
―
When Vdet1_C or Vdet1_D is
selected
―
60
―
When LVD2 is selected
Note:
Note 1.
Note 2.
Note 3.
These characteristics apply when noise is not superimposed on the power supply. When a setting is made so that the voltage
detection level overlaps with that of the voltage detection circuit (LVD1), it cannot be specified which of LVD1 and LVD2 is used
for voltage detection.
When OFS1.(LVDAS, FASTSTUP) = 11b.
When OFS1.(LVDAS, FASTSTUP) ≠ 11b.
The minimum VCC down time indicates the time when VCC is below the minimum value of voltage detection levels V_POR, V_det0,
V_det1, and V_det2 for the POR/LVD.
R01DS0261EJ0110 Rev.1.10
Oct 30, 2015
Page 154 of 177