RX230 Datasheet, PDF (111/177 Pages) Renesas Technology Corp – 54-MHz 32-bit RX MCUs, built-in FPU, 88.56 DMIPS, up to 512-KB flash memory

RX230 Group, RX231 Group
5. Electrical Characteristics
Table 5.23 Operating Frequency Value (Low-Speed Operating Mode)
Conditions: 1.8 V ≤ VCC = VCC_USB = AVCC0 ≤ 5.5 V, VSS = AVSS0 = VREFL0 = VSS_USB = 0 V, T_a = –40 to +105°C
VCC
Item
Symbol _{1.8 V ≤ VCC < 2.4 V ≤ VCC < 2.7 V ≤ VCC ≤} Unit
2.4 V
2.7 V
5.5 V
Maximum
operating
frequency*³
System clock (ICLK)
f_max
FlashIF clock (FCLK)*¹
Peripheral module clock (PCLKA)
32.768
kHz
32.768
32.768
Peripheral module clock (PCLKB)
32.768
Peripheral module clock (PCLKD)*²
32.768
External bus clock (BCLK)
32.768
BCLK pin output
32.768
Note 1. Programming and erasing the flash memory is impossible.
Note 2. The A/D converter cannot be used.
Note 3. The maximum operating frequency listed above does not include errors of the external oscillator. For details on the range for the
guaranteed operation, see Table 5.26, Clock Timing.
Table 5.24 BCLK Clock Timing (1)
Conditions: 2.7 V ≤ VCC= VCC_USB = AVCC0 ≤ 5.5 V, VSS = AVSS0 = VREFL0 = VSS_USB = 0 V,
fBCLK ≤ 32 MHz (BCLK pin output frequency ≤ 16 MHz), T_a = –40 to +105°C
Item
Symbol
Min.
Typ.
Max.
Unit
BCLK pin output cycle time
BCLK pin output high pulse width
BCLK pin output low pulse width
BCLK pin output rise time
BCLK pin output fall time
t_Bcyc
62.5
—
—
ns
t_CH
15
—
—
ns
t_CL
15
—
—
ns
t_Cr
—
—
12
ns
t_Cf
—
—
12
ns
Test Conditions
Figure 5.22
Table 5.25 BCLK Clock Timing (2)
Conditions: 1.8 V ≤ VCC = VCC_USB = AVCC0 < 2.7 V, VSS = AVSS0 = VREFL0 = VSS_USB = 0 V,
fBCLK ≤ 16 MHz (BCLK pin output frequency ≤ 8 MHz), T_a = –40 to +105°C
Item
Symbol
Min.
Typ.
Max.
Unit
BCLK pin output cycle time
BCLK pin output high pulse width
BCLK pin output low pulse width
BCLK pin output rise time
BCLK pin output fall time
t_Bcyc
125
—
—
ns
t_CH
30
—
—
ns
t_CL
30
—
—
ns
t_Cr
—
—
25
ns
t_Cf
—
—
25
ns
Test Conditions
Figure 5.22
R01DS0261EJ0110 Rev.1.10
Oct 30, 2015
Page 111 of 177