RX230 Datasheet, PDF (126/177 Pages) Renesas Technology Corp – 54-MHz 32-bit RX MCUs, built-in FPU, 88.56 DMIPS, up to 512-KB flash memory

RX230 Group, RX231 Group
5. Electrical Characteristics
Table 5.36 Bus Timing (Multiplex bus) (1)
Conditions: 2.7 V ≤ VCC = VCC_USB = AVCC0 ≤ 5.5 V, VSS = AVSS0 = VSS_USB = 0 V,
fBCLK ≤ 32 MHz (BCLK pin output frequency ≤ 16 MHz), T_a = –40 to +105°C, V_OH = VCC × 0.5, V_OL = VCC × 0.5,
I_OH = –1.0 mA, I_OL = 1.0 mA, C_L = 30 pF, when normal output is selected by the drive capacity control register
Item
Symbol
Min.
Max.
Unit
Test
Conditions
Address delay time
Byte control delay time
CS# delay time
RD# delay time
ALE delay time
Read data setup time
Read data hold time
WR# delay time
Write data delay time
Write data hold time
WAIT# setup time
WAIT# hold time
t_AD
—
55
ns
Figure 5.43,
t_BCD
—
55
ns
Figure 5.44
t_CSD
—
55
ns
t_RSD
—
55
ns
t_ALED
—
55
ns
t_RDS
40
—
ns
t_RDH
0
—
ns
t_WRD
—
55
ns
t_WDD
—
55
ns
t_WDH
0
—
ns
t_WTS
40
—
ns
Figure 5.42
t_WTH
0
—
ns
Table 5.37 Bus Timing (Multiplex bus) (2)
Conditions: 1.8 V ≤ VCC = VCC_USB = AVCC0 < 5.5 V, VSS = AVSS0 = VSS_USB = 0 V,
fBCLK ≤ 16 MHz (BCLK pin output frequency ≤ 8 MHz), T_a = –40 to +105°C, V_OH = VCC × 0.5, V_OL = VCC × 0.5,
I_OH = –1.0 mA, I_OL = 1.0 mA, C_L = 30 pF, when normal output is selected by the drive capacity control register
Item
Symbol
Min.
Max.
Unit
Test
Conditions
Address delay time
Byte control delay time
CS# delay time
RD# delay time
ALE delay time
Read data setup time
Read data hold time
WR# delay time
Write data delay time
Write data hold time
WAIT# setup time
WAIT# hold time
t_AD
—
90
ns
Figure 5.43,
t_BCD
—
90
ns
Figure 5.44
t_CSD
—
90
ns
t_RSD
—
90
ns
t_ALED
—
90
ns
t_RDS
60
—
ns
t_RDH
0
—
ns
t_WRD
—
90
ns
t_WDD
—
90
ns
t_WDH
0
—
ns
t_WTS
60
—
ns
Figure 5.42
t_WTH
0
—
ns
R01DS0261EJ0110 Rev.1.10
Oct 30, 2015
Page 126 of 177