RX230 Datasheet, PDF (127/177 Pages) Renesas Technology Corp – 54-MHz 32-bit RX MCUs, built-in FPU, 88.56 DMIPS, up to 512-KB flash memory

RX230 Group, RX231 Group
5. Electrical Characteristics
TW1
BCLK
Address cycle
Data cycle
TWn
Tend
Tn1
Th
Address
Address/
data bus
tAD
Wait for address cycle (AWAIT)
tAD
A
td(AD-ALE)
th(ALE-AD)
tAD
Fixed to 1 cycle
Address latch
(ALE)
tALED
tALED
Wait for RD assertion (RDON)
Data read
(RD#)
Wait for CS assertion (CSON) t_CSD
Chip select
(CS3# to CS0#)
Wait for normal read cycle (CSRWAIT)
tRSD
tRSS
tSU(DB-RD)
40ns(min)
th(RD-DB) 0ns(min)
D
tRDS tRDH
tRSD
tRSS
CS extended cycle when reading (CSROFF)
tCSD
Figure 5.43 External Bus Timing/Read Access Operation Example (Multiplex)
BCLK
Address
Address/
data bus
Address latch
(ALE)
Data write
(WR#)
Chip select
(CS3# to CS0#)
Address cycle
TW1
Wait for write data output (WDON)
tAD
A
Wait for address cycle (AWAIT)
tAD
A
tAD
Fixed to 1 cycle
t t d(BCLK-ALE)= ALED
t t h(BCLK-ALE)= ALED
Wait for WR assertion (WRON)
tCSD
Wait for normal write cycle (CSWWAIT)
Data cycle
Tend
Tn1
Th
D
tRSD
tRSS
tRSD
tRSS
CS extended cycle when writing (CSWOFF)
tCSD
Figure 5.44 External Bus Timing/Write Access Operation Example (Multiplex)
R01DS0261EJ0110 Rev.1.10
Oct 30, 2015
Page 127 of 177