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RX230 Datasheet, PDF (112/177 Pages) Renesas Technology Corp – 54-MHz 32-bit RX MCUs, built-in FPU, 88.56 DMIPS, up to 512-KB flash memory
RX230 Group, RX231 Group
5. Electrical Characteristics
Table 5.26 Clock Timing
Conditions: 1.8 V ≤ VCC = VCC_USB = AVCC0 ≤ 5.5 V, VSS = AVSS0 = VREFL0 = VSS_USB = 0 V, Ta = –40 to +105°C
Item
Symbol
Min.
Typ.
Max.
Unit
Test Conditions
EXTAL external clock input cycle time
tXcyc
50
—
—
ns Figure 5.23
EXTAL external clock input high pulse width
tXH
20
—
—
ns
EXTAL external clock input low pulse width
tXL
20
—
—
ns
EXTAL external clock rise time
tXr
—
—
5
ns
EXTAL external clock fall time
tXf
—
—
5
ns
EXTAL external clock input wait time*1
tXWT
0.5
—
—
μs
Main clock oscillator oscillation 2.4 ≤ VCC ≤ 5.5
fMAIN
1
frequency*2
1.8 ≤ VCC < 2.4
1
—
20
MHz
—
8
Main clock oscillation stabilization time (crystal)*2
tMAINOSC
—
3
—
ms Figure 5.24
Main clock oscillation stabilization time (ceramic
tMAINOSC
—
50
—
μs
resonator)*2
LOCO clock oscillation frequency
LOCO clock oscillation stabilization time
IWDT-dedicated clock oscillation frequency
IWDT-dedicated clock oscillation stabilization time
HOCO clock oscillation frequency
HOCO clock oscillation stabilization time
PLL input frequency*3
PLL circuit oscillation frequency*3
PLL clock oscillation stabilization time
PLL free-running oscillation frequency
USBPLL input frequency*5
USBPLL circuit oscillation frequency*5
USBPLL clock oscillation stabilization time
Sub-clock oscillator oscillation frequency*7
Sub-clock oscillation stabilization time*4
fLOCO
tLOCO
fILOCO
tILOCO
fHOCO
(32 MHz)
fHOCO
(54 MHz)
tHOCO
fPLLIN
fPLL
tPLL
fPLLFR
fPLLIN
fPLL
tPLL
fSUB
tSUBOSC
3.44
—
12.75
—
31.52
31.68
31.36
53.19
53.46
52.92
—
4
24
—
—
—
—
—
—
—
4.0
—
15
—
32
32
32
54
54
54
—
—
—
—
8
6, 8*6
48*6
—
32.768
0.5
4.56
0.5
17.25
50
32.48
32.32
32.64
54.81
54.54
55.08
30
12.5
54
50
—
—
—
50
—
—
MHz
μs
kHz
μs
MHz
MHz
μs
MHz
MHz
μs
MHz
MHz
MHz
μs
kHz
s
Figure 5.25
Figure 5.26
Ta = –40 to + 85°C
Ta = 0 to + 55°C
Ta = –40 to +105°C
Ta = –40 to + 85°C
Ta = 0 to + 55°C
Ta = –40 to +105°C
Figure 5.28
Figure 5.29
Figure 5.29
Figure 5.30
Note 1.
Note 2.
Note 3.
Note 4.
Note 5.
Note 6.
Note 7.
Time until the clock can be used after the main clock oscillator stop bit (MOSCCR.MOSTP) is set to 0 (operating).
Reference values when an 8-MHz resonator is used.
When specifying the main clock oscillator stabilization time, set the MOSCWTCR register with a stabilization time value that is
equal to or greater than the resonator-manufacturer-recommended value.
After the MOSCCR.MOSTP bit is changed to enable the main clock oscillator, confirm that the OSCOVFSR.MOOVF flag has
become 1, and then start using the main clock.
The VCC range should be 2.4 to 5.5 V when the PLL is used.
Reference values when a 32.768-kHz resonator is used.
After the setting of the SOSCCR.SOSTP bit or RCR3.RTCEN bit is changed to operate the sub-clock oscillator, only start using
the sub-clock after the sub-clock oscillation stabilization wait time that is equal to or greater than the oscillator-manufacturer-
recommended value has elapsed.
The VCC range should be 3.0 to 5.5 V when the USBPLL is used.
The input frequency can be set to 6 or 8 MHz and the oscillation frequency can be set to 48 MHz only.
Only 32.768 kHz can be used.
R01DS0261EJ0110 Rev.1.10
Oct 30, 2015
Page 112 of 177