HYB18T512400AF Datasheet, PDF (23/58 Pages) Infineon Technologies AG – 512-Mbit DDR2 SDRAM

Internet Data Sheet
HYB18T512[40/80/16]0AF(L)–[3/3S/3.7/5]
512-Mbit DDR2 SDRAM
Input Pin
×4 components
DQ[3:0]
DQS
DQS
DM
×8 components
DQ[7:0]
DQS
DQS
RDQS
RDQS
DM
×16 components
DQ[7:0]
DQ[15:8]
LDQS
LDQS
UDQS
UDQS
LDM
UDM
EMRS(1) Address Bit A10
X
X
0
X
X
X
0
X
0
X
X
X
X
0
X
0
X
X
Note: X = don’t care; 0 = bit set to low; 1 = bit set to high
TABLE 16
ODT Truth Table
EMRS(1) Address Bit A11
X
X
1
1
0
X
X
Rev. 1.71, 2007-01
23
03062006-CPCN-4867