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| HYB18T512400AF Datasheet, PDF (20/58 Pages) Infineon Technologies AG – 512-Mbit DDR2 SDRAM | |||
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Internet Data Sheet
HYB18T512[40/80/16]0AF(L)â[3/3S/3.7/5]
512-Mbit DDR2 SDRAM
Field
AL
Bits
[5:3]
Type1)
â
RTT
6,2
DIC
1
DLL
0
1) w = write only register bits
Description
Additive Latency
Note: All other bit combinations are illegal.
000B AL 0
001B AL 1
010B AL 2
011B AL 3
100B AL 4
Nominal Termination Resistance of ODT
Note: See Table 24 âODT DC Electrical Characteristicsâ on Page 28
00B RTT â (ODT disabled)
01B RTT 75 Ohm
10B RTT 150 Ohm
11B RTT 50 Ohm
Off-chip Driver Impedance Control
0B DIC Full (Driver Size = 100%)
1B DIC Reduced
DLL Enable
0B DLL Enable
1B DLL Disable
Rev. 1.71, 2007-01
20
03062006-CPCN-4867
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