SAA7111A Datasheet, PDF (56/72 Pages) NXP Semiconductors – Enhanced Video Input Processor EVIP

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17.2.20 SUBADDRESS 16
TABLE 35 STOP OF DECODED DATA ON VPO-PORT SA 16; NOTE 1
FIELD
50 Hz 1st
2nd
1st
2nd
1st
2nd
60 Hz 1st
2nd
1st
2nd
1st
2nd
FRAME
LINE⁽²⁾
COUNTING
1
314
2
315
312
625
1 (4)
264 (267)
2 (5)
265 (268)
262 (265)
525 (3)
MSB
DECIMAL _{(SA 17, D0)}
VALUE
VSTO8
312
1
0....
0
....310
1
262
1
0....
0
....260
1
VSTO7
0
0
0
0
0
0
VSTO6
0
0
0
0
0
0
CONTROL BITS D7 to D0
VSTO5
1
VSTO4
1
VSTO3
1
VSTO2
0
0
0
0
0
1
1
0
1
0
0
0
1
0
0
0
0
0
0
0
1
VSTO1
0
0
1
1
0
0
VSTO0
0
0
1
0
0
1
NOTES
1. STOP OF DECODED DATA ON VPO-PORT (BEGIN OF BYPASSED REGION; STOP OF VREF IF SELECTED BY VCTR1 AND VCTR0; SEE FIGS 8 AND 10).
2. LINE NUMBERS IN BRACKETS REFER TO CCIR LINE COUNTING.
17.2.21 SUBADDRESS 17
Table 36 Sign bits of the VBI-data stream control
FUNCTION
VBI-data stream start (VSTA8); see SA 15
Sign bit VBI-data stream start
VBI-data stream stop (VSTO8); see SA 16
Sign bit VBI-data stream stop
BIT NAME
VSTA8
VSTO8
LOGIC LEVEL
see Table 34
see Table 35
CONTROL BIT
D0
D1