SAA7111A Datasheet, PDF (16/72 Pages) NXP Semiconductors – Enhanced Video Input Processor EVIP

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LUM
Y
PREFILTER
LUMINANCE CIRCUIT
CHROMINANCE
TRAP
VARIABLE
BAND-PASS
FILTER
WEIGHTING
AND
ADDING
STAGE
GPSW
PREF
PREFILTER
SYNC
BYPS
VBLB
BPSS0
BPSS1
PREF
MATCHING
AMPLIFIER
VBLB
LINE 21
TEXT
SLICER
SYNC SLICER
PHASE
DETECTOR
FINE
BYTE1
BYTE2
SYNCHRONIZATION CIRCUIT
STATUS
I²C BUS CONTROL
VNOI0
VNOI1
VTRC _FIDT
AUFD
HSB
HSS
FSEL
VTRC
HLCK
STTC
53
I ²C-BUS
INTERFACE
61 63 62
IICSA SCL SDA
VERTICAL
PROCESSOR
COUNTER
30 29 17
27
28
VS RTS0 VREF HS
RTS1
APER0
APER1
VBLB
CLOCK CIRCUIT
CLOCKS
PHASE
DETECTOR
COARSE
HPLL
VTRC
EXFIL ^VTRC
DAC6
INCS
22
LINE-LOCKED
CLOCK
20
GENERATOR 21
15
CLOCK
GENERATION
CIRCUIT
16
24
LOOP FILTER
2
DISCRETE
TIME
OSCILLATOR 2
CRYSTAL
55
CLOCK
GENERATOR ⁵⁴
CREF
LLC
LLC2
VDDA0
VSSA0
CE
XTALI
XTAL
MGC654
Fig.7 Luminance and sync processing.