XA-SCC Datasheet, PDF (36/42 Pages) NXP Semiconductors – CMOS 16-bit communications microcontroller

Philips Semiconductors
CMOS 16-bit communications microcontroller
Preliminary specification
XA-SCC
ClkOut
OE, BLE, CS
D[7:0]
t_CHAV
EVEN ADDRESS
t_CHAV
t_CHAV
ADDRESS + 1
t_CHAV
ADDRESS + 2
t_CHAV
ADDRESS + 3
NOTE 3
t_DIS
t_DIH
Note 2
LS BYTE
t_DIS
t_DIH
Note 2
MS BYTE
t_DIS
t_DIH
Note 2
LS BYTE
t_CHSH
t_DIS
t_DIH
Note 2
MS BYTE
NOTES: BHE remains high (inactive) for all accesses on an 8 bit bus.
A burst code fetch can be from 1 to 8 words (1 word = 2 bytes), a 2 word fetch is shown here.
To meet the required Data In Hold time, data should be held on the bus at least until the earliest of CS, BLE, OE goes high, or until the address changes, whichever occurs
first.
SU01138
Figure 17. Burst Code Fetch on 8 bit bus, Generic Memory
ClkOut
t_CHAV
A19–A1
A0
CS
t_CHSL
t_CHSL
t_AVSL
BLE, WE
D7–D0
OE is inactive during all writes.
t_SHAH
t_SHDH
t_AVSL
t_DVSL
Figure 18. Generic 16 Bit Write on 8 Bit Bus
t_CHSH
t_SHAH
SU01139
1999 Mar 29
36