XA-SCC Datasheet, PDF (26/42 Pages) NXP Semiconductors – CMOS 16-bit communications microcontroller

Philips Semiconductors
CMOS 16-bit communications microcontroller
Preliminary specification
XA-SCC
Table 6. SCC0 Interrupts (Interrupt structure is the same except for bit locations for all 4 SCCs)
Individual Enable Bit
Potential SCC0 Interrupt MMR Hex Offset
Source Bit
MMR Hex
Offset
Group Enable Bit(s) Group Flag Bit MMR Master Enable Bit
MMR Hex Offset
Hex Offset
MMR Hex Offset
Rx Character Available
–
RR0[0]
WR1[4:3]
Even Channel Rx IP
RR3[5]
SCC0/1 Master
Interrupt Enable
WR9[3]
SDLC EOF
–
RR1[7]
CRC/Framing Error
–
RR1[6]
Rx Overrun
–
RR1[5]
Parity Error
WR1[2]
RR1[4]
Tx Buffer Empty
See WR1[1]
RR0[2]
Tx Interrupt Enable
WR1[1]
Even Channel Tx IP
RR3[4]
Break/Abort
Break/Abort IE
WR15[7]
RR0[7]
Tx Underrun/EOM
Tx Underrun/EOM IE RR0[6]
WR15[6]
CTS
SYNC/HUNT
CTS IE
WR15[5]
SYNC/HUNT IE
WR15[4]
RR0[5]
RR0[4]
Master External/ Status
Interrupt Enable
WR1[0]
Even Channel
External/Status IP
RR3[3]
DCD
DCD IE
WR15[3]
RR0[3]
Zero Count
Zero Count IE
WR15[1]
RR0[1]
EXCEPTION/TRAPS PRECEDENCE
DESCRIPTION
Reset (h/w, watchdog, s/w)
Breakpoint
Trace
Stack Overflow
Divide by 0
User RETI
TRAP 0–15 (software)
VECTOR ADDRESS
0000–0003
0004–0007
0008–000B
000C–000F
0010–0013
0014–0017
0040–007F
ARBITRATION RANKING
0 (High)
1
1
1
1
1
1
1999 Mar 29
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