XA-SCC Datasheet, PDF (16/42 Pages) NXP Semiconductors – CMOS 16-bit communications microcontroller

Philips Semiconductors
CMOS 16-bit communications microcontroller
Preliminary specification
XA-SCC
MMR Name
SCPCFG
SCPD
SCPCS
BDAEE
BDCS
B0CFG
B0AM
B0TMG
B1CFG
B1AM
B1TMG
B2CFG
B2AM
B2TMG
B3CFG
B3AM
B3TMG
B4CFG
B4AM
B4TMG
B5CFG
B5AM
B5TMG
MBCL
RFSH
MSI Control Register
DataMask Register
Hi-Pri Soft Ints & Pin Mux Control Reg.
XInt2
Read/Write or
Read Only
Size
Address
Offset
Description
SCP Interface Registers
R/W
8
260h SCP Configuration
R/W
8
262h SCP Data Byte
R/W
8
263h SCP Control & Status
Autobaud Registers
R/W
8
270h Autobaud Echo Enable
R/W
8
272h Autobaud Control & Status
Memory Interface (MIF) Registers
R/W
8
280h MIF Bank 0 Config
R/W
8
281h MIF Bank 0 Base Address
R/W
8
282h MIF Bank 0 Timing Params
R/W
8
284h MIF Bank 1 Config
R/W
8
285h MIF Bank 1 Base Address
R/W
8
286h MIF Bank 1 Timing Params
R/W
8
288h MIF Bank 2 Config
R/W
8
289h MIF Bank 2 Base Address
R/W
8
28Ah MIF Bank 2 Timing Params
R/W
8
28Ch MIF Bank 3 Config
R/W
8
28Dh MIF Bank 3 Base Address
R/W
8
28Eh MIF Bank 3 Timing Params
R/W
8
290h MIF Bank 4 Config
R/W
8
291h MIF Bank 4 Base Address
R/W
8
292h MIF Bank 4 Timing Params
R/W
8
294h MIF Bank 5 Config
R/W
8
295h MIF Bank 5 Base Address
R/W
8
296h MIF Bank 5 Timing Params
R/W
8
2BEh MIF Memory Bank Configuration Lock Register
R/W
8
2BFh MIF Refresh Control
IDL Interface Registers
R/W
16
2C0h IDL Mode Control Register
R/W
16
2C2h IDL Mask Register
Miscellaneous Registers
R/W
16
2D0h Control bits for Hi-Priority Soft Ints, and Pin Mux
R/W
8
2D2h External Interrupt 2 Control
Reset
Value
8xh
xx
00h
00h ..
00h ..
—
00h..
—
0xh
xxh
xxh
0xh
xx
xx
0xh
xx
xx
0xh
xx
xx
0xh
xx
xx
3Fh
00h
0000h
0000h
0000h
00h
1999 Mar 29
16