XA-SCC Datasheet, PDF (34/42 Pages) NXP Semiconductors – CMOS 16-bit communications microcontroller

Philips Semiconductors
CMOS 16-bit communications microcontroller
Preliminary specification
XA-SCC
CLKOUT
A
t_CHAV
RAS (CS)
CAS (BHE/BLE)
t_CHAH
RAS ADDRESS
tAVSL
t_CHSL
t_CHAV
t_CHAH
CAS ADDRESS
t_CHAV
t_CHAH
CAS ADDRESS + 2
t_CHSH
t_AVSL
t_CHSL
t_CPWH
t_CPWL
t_CHSH
OE
D[15:0]
DRIVEN BY XA
NOTE 3
DRIVEN BY SLAVE DEVICE
t_DIS
WORD
(from CAS ADDR)
NOTE 4
t_DIS
WORD
(from CAS ADDR + 2)
t_OHDE
NOTE 4
4 Byte Fetch (1 word = 2 bytes) is shown on 16 bit bus, burst can be 2 to 16 bytes (1 to 8 words.)
Note 4: To meet hold time, EDO DRAM drives valid Data until OE rises, or until new falling edge of CAS.
Figure 13. DRAM EDO Burst Code Fetch on 16 Bit Bus
SU01134
CLKOUT
A
RAS
t_CHAV
t_CHAV
RAS ADDRESS
t_CHSL
t_AVSL
t_CHSL
t_CHAH
CASL/CASH
OE
t_CHSL
t_AVSL
D[15:0]
CAS ADDRESS
t_CHAV
t_CHAH
CAS ADDRESS + 2
t_CHSH
t_CHAV
t_CHAH
t_CHSH
t_CPWH
t_DIS
INSTRUCTION
NOTE 2
NOTE 2
t_DIS
INSTRUCTION
NOTE: The processor can prefetch from one to eight words (1 word = 2 bytes)
Figure 14. DRAM FPM (Fast Page Mode) Burst Code Fetch
SU01135
1999 Mar 29
34