XA-SCC Datasheet, PDF (14/42 Pages) NXP Semiconductors – CMOS 16-bit communications microcontroller

Philips Semiconductors
CMOS 16-bit communications microcontroller
Preliminary specification
XA-SCC
MMR Name
Buffer Bound Register Ch.1 Rx
Address Pointer Reg Ch.1 Rx
Byte Count Register Ch.1 Rx
Data FIFO Register Ch.1 Lo Rx
Data FIFO Register Ch.1 Hi Rx
DMA Control Register Ch.2 Rx
FIFO Control & Status Register Ch.2 Rx
Segment Register Ch. 2 Rx
Buffer Base Register Ch. 2 Rx
Buffer Bound Register Ch.2 Rx
Address Pointer Reg Ch.2 Rx
Byte Count Register Ch.2 Rx
Data FIFO Register Ch.2 Lo Rx
Data FIFO Register Ch.2 Hi Rx
DMA Control Register Ch.3 Rx
FIFO Control & Status Register Ch.3 Rx
Segment Register Ch. 3 Rx
Buffer Base Register Ch. 3 Rx
Buffer Bound Register Ch.3 Rx
Address Pointer Reg Ch.3 Rx
Byte Count Register Ch.3 Rx
Data FIFO Register Ch.3 Lo Rx
Data FIFO Register Ch.3 Hi Rx
DMA Control Register Ch.0 Tx
FIFO Control & Status Register Ch.0 Tx
Segment Register Ch. 0 Tx
Buffer Base Register Ch. 0 Tx
Buffer Bound Register Ch.0 Tx
Address Pointer Reg Ch.0 Tx
Byte Count Register Ch.0 Tx
Data FIFO Register Ch.0 Tx
Data FIFO Register Ch.0 Tx
DMA Control Register Ch.1 Tx
FIFO Control & Status Register Ch.1 Tx
Segment Register Ch.1 Tx
Read/Write or
Read Only
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Size
Address
Offset
Description
16
116h Upper Bound (plus 1) on A15–A0
16
118h Current Address pointer A15–A0
16
11Ah Corresponds to A15–A0 Byte Count, generates
interrupt if enabled and byte count exceeded.
16
11Ch 11Ch = Byte 0 = older,
11Dh = Byte 1 = younger
16
11Eh 11Eh = Byte 2 = older,
11Fh = Byte 3 = younger
8
120h Control Register
8
121h Control & Status Register
8
122h Points to 64K data segment
8
124h Wrap Reload Value for A15 –A8, A7–A0 reloaded
to zero by hardware
16
126h Upper Bound (plus 1) on A15–A0
16
128h Current Address pointer A15–A0
16
12Ah Corresponds to A15–A0 Byte Count, generates
interrupt if enabled and byte count exceeded.
16
12Ch 12Ch = Byte 0 = older,
12Dh = Byte 1 = younger
16
12Eh 12Eh = Byte 2 = older,
12Fh = Byte 3 = younger
8
130h Control Register
8
131h Control & Status Register
8
132h Points to 64K data segment
8
134h Wrap Reload Value for A15 –A8, A7–A0 reloaded
to zero by hardware
16
136h Upper Bound (plus 1) on A15–A0
16
138h Current Address pointer A15–A0
16
13Ah Corresponds to A15–A0 Byte Count, generates
interrupt if enabled and byte count exceeded.
16
13Ch 13Ch = Byte 0 = older,
13Dh = Byte 1 = younger
16
13Eh 13Eh = Byte 2 = older,
13Fh = Byte 3 = younger
Tx DMA Registers
8
140h Control Register
8
141h Control & Status Register
8
142h Points to 64K data segment
8
144h Wrap Reload Value for A15 –A8, A7–A0 reloaded
to zero by hardware
16
146h Upper Bound (plus 1) on A15–A0
16
148h Current Address pointer A15–A0
16
14Ah Corresponds to A15–A0 Byte Count, generates
interrupt if enabled and byte count exceeded.
16
14Ch 14C = Byte0 = older
14D = Byte 1 = younger
16
14Eh 14E = Byte2 = older
14F = Byte3 = younger
8
150h Control Register
8
151h Control & Status Register
8
152h Points to 64K data segment
Reset
Value
0000h
0000h
0000h
00h
00h
00h
00h
00h
00h
00h
00h
0000h
0000h
0000h
00h
00h
00h
00h
00h
00h
00h
00h
0000h
0000h
0000h
00h
00h
00h
00h
00h
00h
00h
00h
0000h
0000h
0000h
0000h
0000h
00h
00h
00h
1999 Mar 29
14