XA-SCC Datasheet, PDF (12/42 Pages) NXP Semiconductors – CMOS 16-bit communications microcontroller

Philips Semiconductors
CMOS 16-bit communications microcontroller
Preliminary specification
XA-SCC
MMR Name
SCC1 Write Register 13
SCC1 Write Register 14
SCC1 Write Register 15
SCC1 Write Register 16
SCC1 Write Register 17
SCC1 Read Register 0
SCC1 Read Register 1
Reserved
SCC1 Read Register 3
see WR16 and 17
SCC1 Read Register 6
SCC1 Read Register 7
SCC1 Read Register 8
Reserved
SCC1 Read Register 10
Reserved
SCC2 Write Register 0
SCC2 Write Register 1
SCC2 Write Register 2
SCC2 Write Register 3
SCC2 Write Register 4
SCC2 Write Register 5
SCC2 Write Register 6
SCC2 Write Register 7
SCC2 Write Register 8
SCC2 Write Register 9
SCC2 Write Register 10
SCC2 Write Register 11
SCC2 Write Register 12
SCC2 Write Register 13
SCC2 Write Register 14
SCC2 Write Register 15
SCC2 Write Register 16
SCC2 Write Register 17
SCC2 Read Register 0
SCC2 Read Register 1
Reserved
SCC2 Read Register 3
see WR16 and 17
SCC2 Read Register 6
SCC2 Read Register 7
SCC2 Read Register 8
Reserved
SCC2 Read Register 10
Reserved
1999 Mar 29
Read/Write or
Read Only
R/W
R/W
R/W
R/W
R/W
RO
RO
RO
RO
RO
RO
RO
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RO
RO
RO
RO
RO
RO
RO
Size
Address
Offset
Description
8
85Ah Upper Byte of Baud rate time constant
8
85Ch Misc. Control bits
8
85Eh External/Status interrupt control
8
868h Match Character 2 (WR16)
8
86Ah Match Character 3 (WR17)
8
860h Tx/Rx buffer and external status
8
862h Receive condition status/residue code
864h
8
866h Interrupt Pending Bits
868–86Ah see WR16 and WR17 above
8
86Ch SDLC byte count low register
8
86Eh SDLC byte count high & FIFO status
8
870h Receive Buffer
872h
8
874h Loop/clock status
876–87Eh
SCC2 Registers
8
880h Command register
8
882h Tx/Rx Interrupt & data transfer mode
8
884h Extended Features Control
8
886h Receive Parameter and Control
8
888h Tx/Rx misc. parameters & mode
8
88Ah Tx. parameter and control
8
88Ch Sync character or SDLC address field or Match
Character 0
8
88Eh Sync character or SDLC flag or Match Character 1
8
890h Transmit Data Buffer
8
892h Master Interrupt control
8
894h Misc. Tx/Rx control register
8
896h Clock Mode Control
8
898h Lower Byte of Baud rate time constant
8
89Ah Upper Byte of Baud rate time constant
8
89Ch Misc. Control bits
8
89Eh External/Status interrupt control
8
8A8h Match Character 2 (wr16)
8
8AAh Match Character 3 (wr17)
8
8A0h Tx/Rx buffer and external status
8
8A2h Receive condition status/residue code
8A4h
8
8A6h Interrupt Pending Bits
8A8–8AAh see WR16 and WR17 above
8
8ACh SDLC byte count low register
8
8AEh SDLC byte count high & FIFO status
8
8B0h Receive Buffer
8B2h
8
8B4h Loop/clock status
8B6–8BEh
Reset
Value
00h
xx
f8h
00h
00h
—
—
—
—
—
—
—
—
—
—
—
00h
xx
xx
00h
00h
00h
00h
xx
xx
xx
00h
xx
00h
00h
xx
f8h
00h
00h
—
—
—
—
—
—
—
—
—
—
—
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