XA-SCC Datasheet, PDF (15/42 Pages) NXP Semiconductors – CMOS 16-bit communications microcontroller

Philips Semiconductors
CMOS 16-bit communications microcontroller
Preliminary specification
XA-SCC
MMR Name
Buffer Base Register Ch.1 Tx
Buffer Bound Register Ch.1 Tx
Address Pointer Reg Ch.1 Tx
Byte Count Register Ch.1 Tx
Data FIFO Register Ch.1 Lo Tx
Data FIFO Register Ch.1 Hi Tx
DMA Control Register Ch.2 Tx
FIFO Control & Status Register Ch.2 Tx
Segment Register Ch.2 Tx
Buffer Base Register Ch.2 Tx
Buffer Bound Register Ch.2 Tx
Address Pointer Reg Ch.2 Tx
Byte Count Register Ch.2 Tx
Data FIFO Register Ch.2 Lo Tx
Data FIFO Register Ch.2 Hi Tx
DMA Control Register Ch.3 Tx
FIFO Control & Status Register Ch.3 Tx
Segment Register Ch. 3 Tx
Buffer Base Register Ch. 3 Tx
Buffer Bound Register Ch.3 Tx
Address Pointer Reg Ch.3 Tx
Byte Count Register Ch.3 Tx
Data FIFO Register Ch.3Lo Tx
Data FIFO Register Ch.3 Hi Tx
Rx Character Time Out Register Ch.0
Rx Character Time Out Register Ch.1
Rx Character Time Out Register Ch.2
Rx Character Time Out Register Ch.3
Global DMA Interrupt Register
VACS
VACFG
VATCL
VATCH
VAEC
VBCS
VBCFG
VBTCL
VBTCH
VBEC
Read/Write or
Read Only
Size
Address
Offset
Description
R/W
8
154h Wrap Reload Value for A15–A8, A7–A0 reloaded
to zero by hardware
R/W
16
156h Upper Bound (plus 1) on A15–A0
R/W
16
158h Current Address pointer A15–A0
R/W
16
15Ah Corresponds to A15–A0 Byte Count, generates
interrupt if enabled and byte count exceeded.
R/W
16
15Ch Byte0 & 1
R/W
16
15Eh Byte2 & 3
R/W
8
160h Control Register
R/W
8
161h Control & Status Register
R/W
8
162h Points to 64K data segment
R/W
8
164h Wrap Reload Value for A15 –A8, A7–A0 reloaded
to zero by hardware
R/W
16
166h Upper Bound (plus 1) on A15–A0
R/W
16
168h Current Address pointer A15–A0
R/W
16
16Ah Corresponds to A15–A0 Byte Count, generates
interrupt if enabled and byte count exceeded.
R/W
16
16Ch Byte0 & 1
R/W
16
16Eh Byte2 & 3
R/W
8
170h Control Register
R/W
8
171h Control & Status Register
R/W
8
172h Points to 64K data segment
R/W
8
174h Wrap Reload Value for A15 –A8
A7–A0 reloaded to zero by hardware
R/W
16
176h Upper Bound (plus 1) on A15–A0
R/W
16
178h Current Address pointer A15–A0
R/W
16
17Ah Corresponds to A15–A0 Byte Count, generates
interrupt if enabled and byte count exceeded.
R/W
16
17Ch Byte0 & 1
R/W
16
17Eh Byte2 & 3
R/W
180–1FEh RESERVED for future DMA
Miscellaneous DMA Registers
R/W
8
200h 0 value disables counter interrupt.
R/W
8
202h Same as above, for Rx1
R/W
8
204h Same as above, for Rx2
R/W
8
206h Same as above, for Rx3
R/W
16
210h DMA Interrupt Flags
V.54/2047 Registers
R/W
8
240h V.54 2047 Unit A Control & Status
R/W
8
241h V.54 2047 Unit A Configuration
R/W
8
242h V.54 2047 Unit A Threshold Cntr Lo
R/W
8
243h V.54 2047 Unit A Threshold Cntr Hi
R/W
8
244h V.54 2047 Unit A Error Counter
R/W
8
248h V.54 2047 Unit B Control & Status
R/W
8
249h V.54 2047 Unit B Configuration
R/W
8
24Ah V.54 2047 Unit B Threshold Cntr Lo
R/W
8
24Bh V.54 2047 Unit B Threshold Cntr Hi
R/W
8
24Ch V.54 2047 Unit B Error Counter
Reset
Value
00h
0000h
0000h
0000h
0000h
0000h
00h
00h
00h
00h
0000h
0000h
0000h
0000h
0000h
00h
00h
00h
00h
0000h
0000h
0000h
0000h
0000h
—
00h
00h
00h
00h
0000h
00h
—
—
—
—
00h
—
—
—
—
1999 Mar 29
15