XA-SCC Datasheet, PDF (11/42 Pages) NXP Semiconductors – CMOS 16-bit communications microcontroller

Philips Semiconductors
CMOS 16-bit communications microcontroller
Preliminary specification
XA-SCC
Table 2. Memory Mapped Registers
MMR Name
Read/Write or
Read Only
SCC0 Write Register 0
R/W
SCC0 Write Register 1
R/W
SCC0 Write Register 2
R/W
SCC0 Write Register 3
R/W
SCC0 Write Register 4
R/W
SCC0 Write Register 5
R/W
SCC0 Write Register 6
R/W
SCC0 Write Register 7
R/W
SCC0 Write Register 8
R/W
SCC0 Write Register 9
R/W
SCC0 Write Register 10
R/W
SCC0 Write Register 11
R/W
SCC0 Write Register 12
R/W
SCC0 Write Register 13
R/W
SCC0 Write Register 14
R/W
SCC0 Write Register 15
R/W
SCC0 Write Register 16
R/W
SCC0 Write Register 17
R/W
SCC0 Read Register 0
RO
SCC0 Read Register 1
RO
Reserved—do not write
SCC0 Read Register 3
RO
see WR16 and 17
SCC0 Read Register 6
RO
SCC0 Read Register 7
RO
SCC0 Read Register 8
RO
Reserved
SCC0 Read Register 10
RO
Reserved
SCC1 Write Register 0
R/W
SCC1 Write Register 1
R/W
SCC1 Write Register 2
R/W
SCC1 Write Register 3
R/W
SCC1 Write Register 4
R/W
SCC1 Write Register 5
R/W
SCC1 Write Register 6
R/W
SCC1 Write Register 7
R/W
SCC1 Write Register 8
R/W
SCC1 Write Register 9
R/W
SCC1 Write Register 10
R/W
SCC1 Write Register 11
R/W
SCC1 Write Register 12
R/W
Size
Address
Offset
Description
SCCO Registers
8
800h Command register
8
802h Tx/Rx Interrupt & data transfer mode
8
804h Extended Features Control
8
806h Receive Parameter and Control
8
808h Tx/Rx misc. parameters & mode
8
80Ah Tx. parameter and control
8
80Ch Sync character or SDLC address field or Match
Character 0
8
80Eh Sync character or SDLC flag or Match Character 1
8
810h Transmit Data Buffer
8
812h Master Interrupt control
8
814h Misc. Tx/Rx control register
8
816h Clock Mode Control
8
818h Lower Byte of Baud rate time constant
8
81Ah Upper Byte of Baud rate time constant
8
81Ch Misc. Control bits
8
81Eh External/Status interrupt control
8
828h Match Character 2 (WR16)
8
82Ah Match Character 3 (WR17)
8
820h Tx/Rx buffer and external status
8
822h Receive condition status/residue code
824h
8
826h Interrupt Pending Bits
828–82Ah see WR16 and WR17 above
8
82Ch SDLC byte count low register
8
82Eh SDLC byte count high & FIFO status
8
830h Receive Buffer
832h
8
834h Loop/clock status
836–83Eh
SCC1 Registers
8
840h Command register
8
842h Tx/Rx Interrupt & data transfer mode
8
844h Extended Features Control
8
846h Receive Parameter and Control
8
848h Tx/Rx misc. parameters & mode
8
84Ah Tx. parameter and control
8
84Ch Sync character or SDLC address field or Match
Character 0
8
84Eh Sync character or SDLC flag or Match Character 1
8
850h Transmit Data Buffer
8
852h Master Interrupt control
8
854h Misc. Tx/Rx control register
8
856h Clock Mode Control
8
858h Lower Byte of Baud rate time constant
Reset
Value
00h
xx
xx
00h
00h
00h
00h
xx
xx
xx
00h
xx
00h
00h
xx
f8h
00h
00h
—
—
—
—
—
—
—
—
—
—
—
00h
xx
xx
00h
00h
00h
00h
xx
xx
xx
00h
xx
00h
1999 Mar 29
11