XA-SCC Datasheet, PDF (32/42 Pages) NXP Semiconductors – CMOS 16-bit communications microcontroller

Philips Semiconductors
CMOS 16-bit communications microcontroller
Preliminary specification
XA-SCC
CLKOUT
A0
A19–A1
CS
BHE/BLE
t_CHAV
t_AVSL
t_CHSL
t_CHAH
t_AHDR
(DOES NOT INCLUDE A0)
t_CHSH
OE
NOTE 3
t_DIH (NOTE 2)
t_DIS
D15–D0
NOTE: On Generic Data Reads, A0 can terminate a full clock period before A19–A1,
and therefore should not be used on some peripheral devices.
SU01130
Figure 9. Generic (SRAM, ROM, Flash, IO Devices, etc.) Read on 16 Bit Bus
CLKOUT
A[19:0]
CS
t_CHAV
t_AVSL
ADDRESS
t_CHSL
t_CHAV
ADDRESS + 2
t_CHAV
ADDRESS + 4
t_CHSH
BHE/BLE
OE
NOTE 3
D[15:0]
DRIVEN BY XA
t_DIS
t_DIH
NOTE 2
t_DIS
t_DIH
NOTE 2
t_OHDE
t_DIH (NOTE 2)
t_DIS
DRIVEN
BY XA
NOTE: The processor can prefetch from one to eight words.
NOTE 2: To meet the required Data In Hold time, data should be held on the bus at least until the earliest of CS, BHE, BLE, OE goes high, or until the address changes,
whichever comes first.
SU01131
Figure 10. Generic Memory (SRAM, ROM, Flash, etc.) Burst Code Fetch on 16 Bit Bus
1999 Mar 29
32