NS32FX16-15 Datasheet, PDF (77/88 Pages) National Semiconductor (TI) – Imaging/Signal Processor

Appendix A Instruction Formats (Continued)
Trap (UND)
Format 14
Always
Trap (UND)
Format 18
Always
Trap (UND)
Format 15
Always
TL EE 10818 – 62
Trap (UND)
Format 19
Always
TL EE 10818 – 66
Trap (UND)
Format 16
Always
Trap (UND)
Format 17
Always
TL EE 10818 – 63
TL EE 10818 – 64
Implied Immediate Encodings
7
0
r7 r6 r5 r4 r3 r2 r1 r0
Register Mask appended to SAVE ENTER
7
0
ro r1 r2 r3 r4 r5 r6 r7
Register Mask appended to RESTORE EXIT
7
offset
0
lengthb1
Offset Length Modifier appended to INSS EXTS
TL EE 10818 – 65
Note 1 Opcode not defined CPU treats like MOVf First operand has access class of read second operand has access class of write f-field selects 32-bit or 64-
bit data
Note 2 Opcode not defined CPU treats like ADDf First operand has access class of read second operand has access class of read-modify-write f-field selects
32-bit or 64-bit data
Note 3 Reserved opcode execution of this opcode will generate an undefined result
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