NS32FX16-15 Datasheet, PDF (74/88 Pages) National Semiconductor (TI) – Imaging/Signal Processor

4 0 Device Specifications (Continued)
Note 1 During Reset the HOLD signal must be kept high
Note 2 After RSTI is deasserted the first bus cycle will be an instruction fetch at address zero
FIGURE 4-19 Non-Power-On Reset
TL EE 10818 – 57
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