NS32FX16-15 Datasheet, PDF (38/88 Pages) National Semiconductor (TI) – Imaging/Signal Processor

3 0 Functional Description (Continued)
During a VCMAD VCMUL or VCMAC instruction external
HOLD requests will be granted at the end of each memory
access Interrupt requests can only be acknowledged at the
end of the DSPM instruction
CPU accesses to any of the DSPM registers while a vector
instruction is in progress are also delayed until the end of
the instruction
FIGURE 3-12 DSP Module Block Diagram
TL EE 10818 – 21
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