UPD78F4216A Datasheet, PDF (45/60 Pages) NEC – MOS INTEGRATED CIRCUIT

µPD78F4216A, 78F4218A, 78F4216AY, 78F4218AY
Flash Memory Programming Characteristics (VDD = AVDD = 1.9 to 5.5 V, VSS = AVSS = 0 V, VPP = 9.7
to 10.3 V)
(1) Basic characteristics
Parameter
Operating frequency
Symbol
fX
Supply voltage^{Note 1}
VDD supply current
VPP supply current
Write count
Operating temperature^{Note 3}
Storage temperature^{Note 4}
Programming temperature
VDD
VPPL
VPP
VPPH
IDD
IPP
CWRT
TA
Tstg
TPRG
Conditions
4.5 V ≤ VDD ≤ 5.5 V
2.7 V ≤ VDD < 4.5 V
2.0 V ≤ VDD < 2.7 V
1.9 V ≤ VDD < 2.0 V
Upon VPP low-level detection
Upon VPP high-level detection
Upon VPP high-voltage detection
VPP = 10 V
MIN.
2
2
2
2
1.9
0
0.9VDD
9.7
20^Note2
−40
−65
10
TYP.
2
VDD
10
MAX.
12.5
6.25
3.125
2
5.5
0.2VDD
1.1VDD
10.3
40
100
85
125
40
Unit
MHz
MHz
MHz
MHz
V
V
V
V
mA
mA
Times
°C
°C
°C
Notes 1. µPD78F4216A, 78F4216AY K standard: 2.7 V ≤ VDD < 5.5 V, VPP = 10.3 ±0.3 V
E standard: 2.7 V ≤ VDD < 5.5 V, VPP = 10.0 ±0.3 V
2. Operation cannot be guaranteed when the number of writes exceeds 20 times. In the case of the
µPD78F4216A and 78F4216AY with K standard, operation cannot be guaranteed when the number of
writes exceeds 5 times.
3. µPD78F4216A, 78F4216AY K standard: TA = −10 to +60°C
4. µPD78F4216A, 78F4216AY K standard: TA = −10 to +80°C
Cautions 1. If writing is not successful in write operation, execute the program command again, and
execute the verify command to confirm the normal completion of the write operation.
(µPD78F4216A, 78F4216AY: I, K, E, P standard)
2. Handshake mode is supported by the following products.
µPD78F4216A, 78F4216AY: Other than I, K, E standard
µPD78F4218A, 78F4218AY: Other than I standard
Remark The fifth alphabetic character from the left in the lot number indicates the standard of the product. After
executing the program command, execute the verify command to confirm the normal completion of the
write operation.
Handshake mode is the CSI write mode that uses P24.
Data Sheet U14125EJ1V0DS00
45