UPD78F4216A Datasheet, PDF (41/60 Pages) NEC – MOS INTEGRATED CIRCUIT

(2) Write operation
µPD78F4216A, 78F4218A, 78F4216AY, 78F4218AY
(CLK)
A0 to A7
(Output)
tCYK
Lower address
Lower address
A8 to A19
(Output)
AD0 to AD7
(Output)
ASTB
(Output)
WR
(Output)
WAIT
(Input)
Hi-Z
Higher address
tDAID
tDSTOD
Lower address
Hi-Z
(Output)
tSAST
tHSTLA
tFAR
tHWA
tDAW
Data (Output) ^Hi-Z
tHWOD
tSODWR
Higher address
Lower address
(Output)
tWSTH
tDSTW
tDAW
tDAWT
tDWWTL
tDWOD
tWWL
tDWWTH
tHWWT
tDWTW
tDWTID
tDWST
tDSTWT
tDSTWTH
tHSTWT
Remark The signal is output from pins A0 to A7 when P80 to P87 are unused.
Data Sheet U14125EJ1V0DS00
41