UPD78F4216A Datasheet, PDF (17/60 Pages) NEC – MOS INTEGRATED CIRCUIT

µPD78F4216A, 78F4218A, 78F4216AY, 78F4218AY
Table 4-1. Types of Pin I/O Circuits and Recommended Connection of Unused Pins (2/2)
Pin Name
RESET
XT1
XT2
AVREF0
AVREF1
AVDD
AVSS
VPP
I/O Circuit Type
2-G
16
−
I/O
Input
−
Recommended Connection of Unused Pins
−
Connect to VSS
Leave open
Connect to VSS
Connect to VDD
Connect to VSS
Connect this pin to VSS directly or via a pull-down resist in normal
operation mode. Connect the VPP pin to VSS via a pull-down
resistor in a system in which the on-chip flash memory is written
while mounted on the target board.
For the pull-down connection, it is recommended to use a resistor
with a resistance ranging from 470 Ω to 10 kΩ.
Remark Because the circuit type numbers are standardized among the 78K Series products, they are not
sequential in some models (i.e., some circuits are not provided).
Data Sheet U14125EJ1V0DS00
17