UPD78F4216A Datasheet, PDF (20/60 Pages) NEC – MOS INTEGRATED CIRCUIT

µPD78F4216A, 78F4218A, 78F4216AY, 78F4218AY
5. INTERNAL MEMORY SIZE SWITCHING REGISTER (IMS)
IMS is a register that is set by software and is used to specify a part of the internal memory that is not to be used.
By setting this register, the internal memory of the µPD78F4218AY can be mapped identically to that of a mask ROM
version with a different internal memory (ROM and RAM) capacity.
IMS is set with an 8-bit memory manipulation instruction.
RESET input sets IMS to FFH.
(1) µPD78F4216A, 78F4216AY
Figure 5-1. Internal Memory Size Switching Register (IMS) Format
Address: 0FFFCH
After reset: FFH W
7
6
5
4
3
IMS
1
1
ROM1
ROM0
1
2
1
0
1
RAM1
RAM0
ROM1
0
0
1
1
ROM0
0
1
0
1
48 KB
64 KB
96 KB
128 KB
Internal ROM Capacity Selection
RAM1
0
0
1
1
RAM0
0
1
0
1
3,072 bytes
4,608 bytes
6,114 bytes
7,680 bytes
Peripheral RAM Capacity Selection
Caution IMS is not provided on the mask ROM versions (µPD784214A, 784215A, 784216A, µPD784214AY,
784215AY, and 784216AY).
Table 5-1 shows the IMS setting values to make the memory mapping the same as that of the mask ROM
versions.
Table 5-1. Setting Value of Internal Memory Size Switching Register (IMS)
Target Mask ROM Version
µPD784214A, 784214AY
µPD784215A, 784215AY
µPD784216A, 784216AY
IMS Setting Value
ECH
FDH
FFH
20
Data Sheet U14125EJ1V0DS00