UPD78F4216A Datasheet, PDF (21/60 Pages) NEC – MOS INTEGRATED CIRCUIT

µPD78F4216A, 78F4218A, 78F4216AY, 78F4218AY
(2) µPD78F4218A, 78F4218AY
Figure 5-2. Internal Memory Size Switching Register (IMS) Format
Address: 0FFFCH
After reset: FFH W
7
6
5
4
3
IMS
1
1
ROM1
ROM0
1
2
1
0
1
RAM1
RAM0
ROM1
0
0
1
1
ROM0
0
1
0
1
64 KB
128 KB
192 KB
256 KB
Internal ROM Capacity Selection
RAM1
0
0
1
1
RAM0
0
1
0
1
Peripheral RAM Capacity Selection
3,072 bytes
6,656 bytes
7,168 bytes
12,288 bytes
Caution IMS is not provided on the mask ROM versions (µPD784217A, 784218A, 784217AY, and
784218AY).
Table 5-2 shows the IMS setting values to make the memory mapping the same as that of the mask ROM
versions.
Table 5-2. Setting Value of Internal Memory Size Switching Register (IMS)
Target Mask ROM Version
µPD784217A, 784217AY
µPD784218A, 784218AY
IMS Setting Value
EFH
FFH
Data Sheet U14125EJ1V0DS00
21