UPD78F4216A Datasheet, PDF (18/60 Pages) NEC – MOS INTEGRATED CIRCUIT

µPD78F4216A, 78F4218A, 78F4216AY, 78F4218AY
Figure 4-1. Types of Pin I/O Circuits (1/2)
Type 2-G
Type 10-K
Pullup
enable
IN
Data
Schmitt-triggered input with hysteresis characteristics
Open drain
Output disable
VDD
P-ch
VDD
P-ch
N-ch
IN/OUT
Type 5-A
Pullup
enable
Data
Output
disable
Input
enable
Type 8-N
Pullup
enable
Data
Output
disable
VDD
Type 10-L
P-ch
VDD
Pullup
enable
P-ch
N-ch
IN/OUT
Data
Open drain
Output disable
VDD
Type 10-M
P-ch
VDD
P-ch
N-ch
IN/OUT
Pullup
enable
Data
Output disable
VDD
P-ch
VDD
P-ch
N-ch
VSS
IN/OUT
VDD
P-ch
VDD
P-ch
N-ch
VSS
IN/OUT
Type 9
P-ch
IN
N-ch
Comparator
VREF
(Threshold voltage)
Input
enable
Type 12-E
VDD
Pullup
enable
Data
Output
disable
P-ch
VDD
P-ch
IN/OUT
N-ch
Input
enable
Analog output
voltage
P-ch
N-ch
18
Data Sheet U14125EJ1V0DS00