MT9V112 Datasheet, PDF (8/58 Pages) Micron Technology – SOC VGA DIGITAL IMAGE SENSOR

PRELIMINARY
MT9V112
SOC VGA DIGITAL IMAGE SENSOR
Typical Connections
Figure 3 shows typical MT9V112 device connec-
tions. For low-noise operation, the MT9V112 requires
separate power supplies for analog and digital. Incom-
ing digital and analog ground conductors can be tied
together next to the die. Both power supply rails
should be decoupled to ground using capacitors. The
use of inductance filters is not recommended.
The MT9V112 also supports different digital core
(VDD/DGND) and I/O power (VDDQ/DGND) power
domains that can be at different voltages.
Figure 3: Typical Configuration (connection)
VDDQ VDD VAA VAAPIX
Power¹ Power¹ Power¹ Power¹
STANDBY from
Controller
or Digital GND
Master Clock
Two-Wire
Serial Interface
10µF
VDDQ VDD
SADDR
STANDBY
VAA VAAPIX
DOUT(7:0)
PIXCLK
LINE_VALID
FRAME_VALID
CLKIN
SDATA
SCLK
TEST_ENABLE
RESET#
DGNDQ DGND
AGND
STROBE
To CMOS
Camera
Port
To Xenon
or LED
Flash Driver
VDDQ
VDD
DGND AGND
VAAPIX
VAA
0.1µF
1µF
0.1µF
1µF
0.1µF
1µF
0.1µF
1µF
DGND
DGND
AGND
AGND
NOTE:
1. A 1.5KΩ resistor value is recommended, but may be greater for slower two-wire speed.
2. MT9V112 STANDBY can be connected to customer’s ASIC controller directly or to Digital GND, depending on the con-
troller’s capability.
09005aef8154a39d/09005aef8175e6cc
MT9V112_2.fm- Rev. A 1/05 EN
8
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2004 Micron Technology, Inc. All rights reserved.