MT9V112 Datasheet, PDF (31/58 Pages) Micron Technology – SOC VGA DIGITAL IMAGE SENSOR

PRELIMINARY
MT9V112
SOC VGA DIGITAL IMAGE SENSOR
Table 10: Camera Control Register Description (continued)
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Reserved.
Reserved.
Reserved.
Reserved.
Resize/zoom context. Switch resize/zoom contexts:
0: Context A
1: Context B
Output format control 2 Context. See R58:1 and R155:1.
0: Context A
1: Context B
Gamma table context.
0: Context A
1: Context B
Arm Xenon Flash.
Blanking control. This is primarily for use by the internal sequencer when taking automated (e.g., flash)
snapshots. Setting this bit stops frames from being sent over the BT656 external pixel interface. This is useful
for ensuring that the desired frame during a snapshot sequence is the only frame captured by the host.
0: No blanking
1: Blank frames to host
Reserved.
Reserved.
Sensor Read Mode context (skip mode, power mode (second ADC on/off), see R33:0 and R32:0.
0: Context A
1: Context B
LED Flash ON:
0: Turn off LED Flash
1: Turn on LED Flash
Vertical blanking context:
0: Context A
1: Context B
Horizontal blanking context:
0: Context A
1: Context B
09005aef8154a39d/09005aef8175e6cc
MT9V112_2.fm- Rev. A 1/05 EN
31
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©2004 Micron Technology, Inc. All rights reserved.