MT9V112 Datasheet, PDF (47/58 Pages) Micron Technology – SOC VGA DIGITAL IMAGE SENSOR

PRELIMINARY
MT9V112
SOC VGA DIGITAL IMAGE SENSOR
Reset, Clocks, and Standby
Reset
Power-up reset is asserted/de-asserted on RESET#.
It is active LOW. In this reset state, all control registers
have the default values.
Soft reset is asserted/de-asserted by the two-wire
serial interface program. In soft-reset mode, the two-
wire serial interface and register ring bus are still run-
ning. All control registers are reset using default values.
See R13:0.
Clocks
The MT9V112 has two primary clocks; a master
clock coming from the CLKIN signal, and a pixel clock
via a clock-gated operation running at half frequency
of the master clock. All device clocks are turned off in
power-down mode. When the MT9V112 operates in
sensor stand-alone mode, the image flow pipeline
clocks can be shut off to conserve power. See R13:0 on
page 38.
When the MT9V112 is operated with the MT9M111
in a dual-camera application, the MT9V112 employs a
divide-by-two clock option, allowing a 54 MHz input to
the master clock. For more information about this fea-
ture, see the R13:0 register description on page 38 in
Table 12.
Standby
STANDBY is a multifunctional signal that controls
power-down, device addressing, and tri-state func-
tions. Table 17 shows how STANDBY affects the out-
put signal state.
Hard standby is asserted/de-asserted on STANDBY.
It is active HIGH. In this hard standby state, all internal
clocks are turned off and the analog block is in standby
mode to save power consumption. The signal state is
High-Z when R13[4] = 0 and R13[6] = 0.
Two-wire interface ID addressing is based on the
result of SADDR XOR R13:0[10]. (The R13:0[10] default
is “0”.) The R13:0[10] bit is not writable when
STANDBY is asserted “1.”
Soft standby is asserted/de-asserted by a two-wire
serial interface to R13:0[2]. In soft standby, all internal
clocks are turned off, the analog block is in standby
mode, but the signal state is not affected. Following the
assertion of either hard or soft standby, the analog cir-
cuitry completes reading the current row and then
enters the standby state. It is necessary to keep clock-
ing the sensor for an entire row time to ensure proper
entry into the standby state.
.
Table 17: STANDBY Effect on the
Output State
DRIVE
SIGNAL
R13:0[6]
0
0
1
x
OUTPUT
DISABLE
R13:0[4]
0
0
0
1
STANDBY
0
1
x
x
OUTPUT STATE
Driven
High-Z
Driven
High-Z
09005aef8154a39d/09005aef8175e6cc
MT9V112_2.fm- Rev. A 1/05 EN
47
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