MT9V112 Datasheet, PDF (54/58 Pages) Micron Technology – SOC VGA DIGITAL IMAGE SENSOR

PRELIMINARY
MT9V112
SOC VGA DIGITAL IMAGE SENSOR
Two-Wire Serial Interface Sample
Write and read sequences (SADDR = 1).
16-Bit Write Sequence
A typical write sequence for writing 16 bits to a reg-
ister is shown in Figure 15. A start bit sent by the mas-
ter starts the sequence, followed by the write address.
The image sensor sends an acknowledge bit and
expects the register address to come first, followed by
the 16-bit data. After each 8-bit transfer, the image
sensor sends an acknowledge bit. All 16 bits must be
written before the register is updated. After 16 bits are
transferred, the register address is automatically incre-
mented so that the next 16 bits are written to the next
register. The master stops writing by sending a start or
stop bit.
Figure 15: WRITE Timing to R0x09:0—Value 0x0284
SCLK
SDATA
0xBA Address
Start
ACK
Reg 0x09
ACK
0000 0010
ACK
1000 0100
Stop
ACK
16-Bit Read Sequence
A typical read sequence is shown in Figure 16. The
master WRITEs the register address, as in a write
sequence. Then a start bit and the read address specify
that a read is about to occur from the register. The
master then clocks out the register data, 8 bits at a
time. The master sends an acknowledge bit after each
8-bit transfer. The register address should be incre-
mented after every 16 bits is transferred. The data
transfer is stopped when the master sends a no-
acknowledge bit.
Figure 16: READ Timing from R0x09:0; Returned Value 0x0284
SCLK
SDATA
0xBA Address
Start
ACK
Reg0x09
ACK
0xBB Address
Start
ACK
0000 0010
ACK
1000 0100
Stop
NACK
09005aef8154a39d/09005aef8175e6cc
MT9V112_2.fm- Rev. A 1/05 EN
54
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