MT9V112 Datasheet, PDF (6/58 Pages) Micron Technology – SOC VGA DIGITAL IMAGE SENSOR

PRELIMINARY
MT9V112
SOC VGA DIGITAL IMAGE SENSOR
General Description
The Micron^ Imaging MT9V112 is a VGA-format,
single-chip camera CMOS active-pixel digital image
sensor. This device combines the MT9V012 image sen-
sor core with fourth-generation digital image flow pro-
cessor technology from Micron Imaging. It captures
high-quality color images at VGA resolution.
The VGA CMOS image sensor features DigitalClar-
ity—Micron’s breakthrough low-noise CMOS imaging
technology that achieves CCD image quality (based on
signal-to-noise ratio and low-light sensitivity) while
maintaining the inherent size, cost, and integration
advantages of CMOS.
The sensor is a complete camera-on-a-chip solu-
tion designed specifically to meet the low-power, low-
cost demands of battery-powered products such as
cellular phones, PDAs, and toys. It incorporates
sophisticated camera functions on-chip and is pro-
grammable through a simple two-wire serial interface.
The MT9V112 performs sophisticated processing
functions including color recovery, color correction,
sharpening, programmable gamma correction, auto
black reference clamping, auto exposure, automatic
50Hz/60Hz flicker avoidance, lens shading correction,
auto white balance (AWB), and on-the-fly defect iden-
tification and correction. Additional features include
day/night mode configurations; special camera effects
such as sepia tone and solarization; and interpolation
to arbitrary image size with continuous filtered zoom
and pan. The device supports both Xenon and LED-
type flash light sources in several snapshot modes.
The MT9V112 can be programmed to output pro-
gressive-scan images up to 30 frames per second (fps).
The image data can be output in any one of six 8-bit
formats:
• ITU-R BT.656 (formerly CCIR656, progressive
scan only) YCbCr
• 565RGB
• 555RGB
• 444RGB
• Raw Bayer
• Processed Bayer
The FRAME_VALID and LINE_VALID signals are
output on dedicated balls, along with a pixel clock that
is synchronous with valid data.
Functional Overview
The MT9V112 is a fully-automatic, single-chip cam-
era, requiring only a power supply, lens, and clock
source for basic operation. Output video is streamed
via a parallel 8-bit DOUT port, shown in Figure 1 on
page 7. The output pixel clock is used to latch data,
while FRAME_VALID and LINE_VALID signals indicate
the active video. The MT9V112 internal registers are
configured using a two-wire serial interface.
The device can be put in a low-power sleep mode by
asserting STANDBY and shutting down the clock. Out-
put signals can be tri-stated. Both tri-stating output
signals and entry in standby mode also can be
achieved via two-wire serial interface register writes.
The MT9V112 accepts input clocks up to 27 MHz,
delivering up to 30 fps for VGA resolution images.
Internal Architecture
Internally, the MT9V112 consists of a sensor core
and an image flow processor (IFP). The IFP is divided
in two sections: the colorpipe (CP), and the camera
controller (CC). The sensor core captures raw Bayer-
encoded images that are then input in the IFP. The CP
section of the IFP processes the incoming stream to
create interpolated, color-corrected output, and the
CC section controls the sensor core to maintain the
desired exposure and color balance, and to support
snapshot modes. The sensor core, CP, and CC registers
are grouped in three separate address spaces, shown
in Figure 2. When accessing internal registers via the
two-wire serial interface, select the desired address
space by programming the R240 register.
The MT9V112 accelerates mode-switching with
hardware-assisted context switching, and supports
taking snapshots, flash snapshots, and video clips
using a configurable sequencer.
The MT9V112 supports a range of color formats
derived from four primary color representations:
YCbCr, RGB, raw Bayer (unprocessed, directly from the
sensor), and processed Bayer (Bayer format data
regenerated from processed RGB). The device also
supports a variety of output signaling/timing options:
• Standard FRAME_VALID/LINE_VALID video
interface with gated pixel clocks
• ITU-R BT.656 marker-embedded video interface
with either gated or uniform pixel clocking
09005aef8154a39d/09005aef8175e6cc
MT9V112_2.fm- Rev. A 1/05 EN
6
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2004 Micron Technology, Inc. All rights reserved.