LAN8740A Datasheet, PDF (90/136 Pages) Microchip Technology – Small Footprint MII/RMII 10/100 Energy Efficient Ethernet Transceiver with HP Auto-MDIX and flexPWR® Technology

LAN8740A/LAN8740Ai
4.3.7 WAKEUP CONTROL AND STATUS REGISTER (WUCSR)
Index (In Decimal): 3.32784
Size:
16 bits
Bits
15
14:13
12:11
10
9
8
7
6
5
4
Description
Interface Disable
0 = MII/RMII interface enabled
1 = MII/RMII interface disabled. Outputs driven to a low level and inputs
ignored.
LED1 Function Select
00 = LED1 functions as Link/Activity.
01 = LED1 functions as nINT.
10 = LED1 functions as nPME.
11 = LED1 functions as Link Speed.
Note: Refer to Section 3.8.1, "LEDs" for additional information.
LED2 Function Select
00 = LED2 functions as Link Speed.
01 = LED2 functions as nINT.
10 = LED2 functions as nPME.
11 = LED2 functions as Link/Activity.
Note: Refer to Section 3.8.1, "LEDs" for additional information.
RXD2/RMIISEL Function Select
0 = RXD2/RMIISEL pin functions normally as RXD2/RMIISEL.
1 = RXD2/RMIISEL pin functions as nPME.
Note: Refer to Section 3.8.4, "Wake on LAN (WoL)" for additional infor-
mation.
nPME Self Clear
0 = nPME pin is not self clearing.
1 = nPME pin is self clearing.
Note:
When set, the de-assertion delay of the nPME signal is controlled
by the nPME Assert Delay bit of the Miscellaneous Configuration
Register (MCFGR). Refer to Section 3.8.4, "Wake on LAN (WoL)"
for additional information.
WoL Configured
This bit may be set by software after the WoL registers are configured. This
sticky bit (and all other WoL related register bits) is reset only via a power
cycle or a pin reset, allowing software to skip programming of the WoL regis-
ters in response to a WoL event.
Note: Refer to Section 3.8.4, "Wake on LAN (WoL)" for additional infor-
mation.
Perfect DA Frame Received (PFDA_FR)
The MAC sets this bit upon receiving a valid frame with a destination address
that matches the physical address.
Remote Wakeup Frame Received (WUFR)
The MAC sets this bit upon receiving a valid remote Wakeup Frame.
Magic Packet Received (MPR)
The MAC sets this bit upon receiving a valid Magic Packet.
Broadcast Frame Received (BCAST_FR)
The MAC Sets this bit upon receiving a valid broadcast frame.
Type
R/W
NASR
R/W
NASR
R/W
NASR
R/W
NASR
R/W
NASR
R/W/
NASR
R/WC/
NASR
R/WC/
NASR
R/WC/
NASR
R/WC/
NASR
Default
0b
0b
0b
0b
0b
0b
0b
0b
0b
0b
DS00001987A-page 90
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