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LAN8740A Datasheet, PDF (119/136 Pages) Microchip Technology – Small Footprint MII/RMII 10/100 Energy Efficient Ethernet Transceiver with HP Auto-MDIX and flexPWR® Technology
LAN8740A/LAN8740Ai
5.6.3 MII INTERFACE TIMING
This section specifies the MII interface transmit and receive timing. Please refer to Section 3.4.1, "MII" for additional
details.
FIGURE 5-3:
MII RECEIVE TIMING
RXCLK
(OUTPUT)
tclkp
tclkh tclkl
tval
tval
tinvld
RXD[3:0]
(OUTPUTS)
tinvld
tval
RXDV, RXER
(OUTPUTS)
TABLE 5-9: MII RECEIVE TIMING VALUES
Symbol
Description
Min.
Typ.
tclkp
RXCLK period
(see Note 1)
tclkh
RXCLK high time
tclkp * 0.4
tclkl
RXCLK low time
tclkp * 0.4
tval
RXD[3:0], RXDV, RXER output
valid from rising edge of RXCLK
tinvld
RXD[3:0], RXDV, RXER output
10.0
invalid from rising edge of RXCLK
Note 1: 40 ns for 100BASE-TX operation, 400 ns for 10BASE-T operation.
2: Timing was designed for system load between 10 pF and 25 pF.
Max.
tclkp * 0.6
tclkp * 0.6
28.0
Unit
Note
ns
ns
ns
ns (see Note 2)
ns (see Note 2)
 2013-2015 Microchip Technology Inc.
DS00001987A-page 119