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| LAN8740A Datasheet, PDF (121/136 Pages) Microchip Technology – Small Footprint MII/RMII 10/100 Energy Efficient Ethernet Transceiver with HP Auto-MDIX and flexPWR® Technology | |||
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LAN8740A/LAN8740Ai
5.6.3.1 100 Mbps Internal Loopback MII Timing
FIGURE 5-5:
100 MBPS INTERNAL LOOPBACK MII TIMING
TXCLK
(OUTPUT)
TXEN
(INPUT)
t1
RXDV
(OUTPUT)
RXD[3:0]
(OUTPUTS)
TABLE 5-11: 100 MBPS INTERNAL LOOPBACK MII TIMING VALUES
Symbol
t1
Description
TXCLK rising edge after TXEN assertion to
RXDV assertion
(100 Mbps internal loopback MII mode)
Min.
Typ.
160
161
Max.
Unit
162
ns
Note:
The t1 measurement applies in MII mode when the Loopback bit of the Basic Control Register is set to â1â
and a link has been established in 100 Mb full-duplex mode. The t1 measurement is taken from the first
rising edge of TXCLK following assertion of TXEN to the rising edge of RXDV.
ï£ 2013-2015 Microchip Technology Inc.
DS00001987A-page 121
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